23 Commits

Author	SHA1	Message	Date
hathach	e0f1ba8b0e	fully work with multiple ports without CFG_TUSB_RHPORT0/1	2023-07-07 16:07:11 +07:00
hathach	4bbacb1008	correct setting trace clock	2023-07-07 11:07:57 +07:00
hathach	f79529c09c	usb hs work with ra 6m5 ek	2023-07-05 17:13:01 +07:00
hathach	1d6ca3bc9b	fix ra4m3 ek build	2023-07-04 20:04:54 +07:00
hathach	071c30f381	update fsp to version 4.5, correct RA BSP. Fix ETM Trace with 6m5 by lowering PLL to 128Mhz.	2023-07-04 19:27:37 +07:00
hathach	bb0e688b8e	add jlinkscript for detect rtt	2023-07-03 16:35:22 +07:00
hathach	d5d1b43eb9	board pin data clean up	2023-07-03 12:07:27 +07:00
hathach	960d9fa6f1	move files around	2023-07-03 11:03:50 +07:00
hathach	ad7764b5b2	move vector_data.h and ioport_cfg.h to common family	2023-07-03 10:54:37 +07:00
hathach	787229a35e	add etm trace for 6m5	2023-07-02 23:39:43 +07:00
hathach	ec02ddf986	initial ra6m5 ek, board_test led + sw works	2023-07-01 21:43:52 +07:00
hathach	54dc699ddd	forgot board.mk for ra6m1	2023-07-01 17:43:06 +07:00
hathach	c5d958d104	add ra6m1 board	2023-07-01 17:27:45 +07:00
hathach	50381f7b4c	refactor to match fsp_cfg	2023-07-01 17:09:09 +07:00
hathach	22fb66436d	update linker	2023-07-01 16:40:47 +07:00
hathach	99e75e6a8a	rework ra build	2023-07-01 12:41:12 +07:00
hathach	3cb4d73899	clean up ra makefile	2023-06-30 14:52:04 +07:00
hathach	eb7fcf1b74	add CPU_CORE for all family	2023-06-24 18:38:41 +07:00
hathach	e0b1de923c	add ra4m1_ek board	2023-03-16 22:43:58 +07:00
hathach	2a10d5c20b	rename ra board name	2023-03-16 11:39:53 +07:00
Rafael Silva	60aae59eeb	style code for consistency with existing codebase	2022-06-02 09:35:30 +01:00
Rafael Silva	e0220c6594	fix int handling for host in ek_ra4m3 port	2022-06-02 09:35:30 +01:00
Rafael Silva	4c89776a27	add renesas ek-ra4m3 board port ... Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>	2022-06-02 09:35:30 +01:00