Stefan Kerkmann
e5bd6bdeff
Update nuclei-sdk with __riscv_flen fix
2021-08-03 20:01:10 +02:00
Stefan Kerkmann
790d90bf26
Set FreeRTOS to RISC-V (doesn't compile)
2021-08-03 20:01:10 +02:00
Stefan Kerkmann
23e3b1680b
Use JTAG for jlink flashing
2021-08-03 20:01:10 +02:00
Stefan Kerkmann
3db2089aa9
Minor clean ups
2021-08-03 20:00:39 +02:00
Stefan Kerkmann
771bbe8af7
Use https github as submodule
2021-08-03 20:00:39 +02:00
Stefan Kerkmann
ddb83787a0
Disable -Werror for now
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Without having __riscv_flen defined we get multiple warinings. But
defining it causes the startup code to contain floating point instructions.
This results in a exception right after booting.
See startup_gd32vf103.S lines 289-294 should open a PR at nuclei sdk
2021-08-03 20:00:39 +02:00
Stefan Kerkmann
19b971cb24
Add board support for gd32vf103 longan nano
2021-08-03 20:00:39 +02:00
Stefan Kerkmann
2657560b63
Add hacky GD32VF103 support
2021-08-03 20:00:35 +02:00
hathach
6805c9d734
add back info to readme, use stack.svg
2021-08-03 18:25:02 +01:00
Peter Lawrence
b682ce916a
net_lwip_webserver: utilize pbuf_copy_partial()
2021-08-02 20:52:45 -05:00
HiFiPhile
bece3bca08
Add @HiFiPhile in CONTRIBUTORS.rst
2021-08-02 20:20:23 +02:00
Ha Thach
af8e5a90f4
Merge pull request #991 from hathach/fix-midi-available
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correct midi available with already stream read
2021-08-02 19:25:24 +07:00
hathach
794bbd7177
fix warning
2021-08-02 18:58:27 +07:00
hathach
98e4ba6a12
correct midi available with already stream read
2021-08-02 18:55:12 +07:00
Ha Thach
8a48e994b6
Merge pull request #874 from kkitayam/add_xfer_fifo_for_rx63
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Add dcd_edpt_xfer_fifo() for RX63N
2021-08-02 17:12:20 +07:00
kkitayam
45e55a8ea0
fix: D0FIFOSEL setting was incorrectly when big-endian is selected.
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In pipe_xfer_in(), the endianness setting of D0FIFOSEL was lacking due to refactoring.
And add type cast operation to avoid warnings by CCRX.
2021-07-31 12:20:19 +09:00
MasterPhi
383290a634
Move register define to separate header.
2021-07-30 21:15:58 +02:00
perigoso
1a27dad7bb
docs/supported: add Waveshare OpenH743I-C to board support list
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:48:08 +01:00
perigoso
0e6e137f5d
readme: add local links to documentation
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
a6ae310f5f
readme: convert md readme to rst
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
83d72cc1d5
docs/contributors: add credit for docs
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
0da08031ea
readme: added docs status badge
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
f900a3ba7f
docs: remove doxygen files
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
37e2342086
readme: remove redundant info, and point to new docs
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
358d781162
docs: update main index
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
37c56d677a
docs: add local copy of stackup image, with added backround
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
8e791c118c
docs: add info section index
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
21e3fca4be
docs: add list of projects that use Tusb
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
42f551ec54
docs: add supported devices list
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
ff3c01ecc2
docs: move contributors to info section
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
a183e5a72b
docs: add structure doc
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
e2d05bff93
docs: add contributing section index
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
f4f1e1f06f
docs: port porting doc to rst
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
62049089ba
docs: add reference section index
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
106924be9a
docs: port getting started doc to rst
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
9d3e1aaafc
docs: port concurrency doc to rst
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
1bbac1c818
changelog: move from root to docs subdirectory
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
4fde6a81d9
docs: symbolic link to changelog file for use in documentation
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
883040e88e
changelog: create changelog file and import from release
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
d9518eb337
docs: symbolic link to code of conduct file for use in documentation
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
a8c9d999c7
code_of_conduct: refactor file from markdown to restructuredtext
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
c4c0c987e8
docs: symbolic link contributors file for use in documentation
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
f424765514
contributors: refactor contributors file from markdown to restructuredtext
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
27a9a7d7f1
readme: use new svg logo
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:30 +01:00
perigoso
51c2240efa
docs: add readthedocs config
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:29 +01:00
perigoso
665c9c996a
docs: add new svg logo
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:29 +01:00
perigoso
bf99adc3c9
docs: setup sphinx docs
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Signed-off-by: perigoso <perigoso@riseup.net>
2021-07-30 12:46:15 +01:00
MasterPhi
c4cd36980d
Add cache clean/invalidate.
2021-07-30 12:07:23 +02:00
MasterPhi
8b5625bf4e
Move clock enable to BSP.
2021-07-30 12:07:23 +02:00
kkitayam
ff20e4d6bc
add the entry for RX72N
2021-07-29 20:45:51 +09:00