hathach
ffdffc7e06
rename FREERTOS_PORT to FREERTOS_PORTABLE_SRC
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also fix trailing spaces
2023-03-16 23:11:11 +07:00
hathach
05e0205ad0
Merge branch 'master' into renesas-ra
2023-03-08 21:05:06 +07:00
Bastien Nocera
6a2cf67289
Fix typos
2022-12-04 19:43:23 +07:00
Rafael Silva
2a17a7e8f8
rework make freertos port handling
...
this allows ports to specify a freertos port outside the FreeRTOS-Kernel lib directory, which would otherwise not be possible
Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
2022-06-02 09:35:30 +01:00
hathach
215e0595ab
change F207 to use new dwc2
2021-10-31 00:09:40 +07:00
hathach
253430a765
add example specific DEPS_SUBMODULES
2021-03-18 16:28:44 +07:00
hathach
ed8f117dd1
explicitly add dcd source file without vendor/family
2021-03-17 16:52:07 +07:00
hathach
7d877e286a
update DEPS_SUBMODULES to optimize ci
2021-03-05 22:24:03 +07:00
hathach
590d8d4d5c
rename FAMILY_SUBMODULES to DEPS_SUBMODULES
2021-03-04 22:53:02 +07:00
hathach
b846ded487
merge no-family example build
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specify FAMILY_SUBMODULES for all boards
2021-03-04 22:50:45 +07:00
hathach
a6efe475e7
use cmsis 5 for all stm32
2020-10-30 14:14:28 +07:00
hathach
bbcf2d7e01
f2 use offical st driver repo
2020-10-30 13:01:01 +07:00
hathach
ec018fbf4e
clean up jlink default interface
2020-10-08 17:17:37 +07:00
hathach
50be9d7c3a
mass rename tud/dcd_irq_handler to tud/dcd_init_handler
2020-04-17 12:27:53 +07:00
hathach
8f17945b67
move irq for stm32 synopsys
2020-04-08 16:37:09 +07:00
Nathan Conrad
705d43cda7
Modify include of HAL, and remove CMSIS clock configuration code, and implement UART for STM32F407Disco
2020-03-26 10:10:06 -04:00
hathach
4494720dbc
clean up HSE_VALUE for stm32
2020-01-10 15:14:37 +07:00
hathach
04cf337b79
clean up flash-stlink
2020-01-10 15:09:59 +07:00
Ha Thach
0b540fa55d
Merge pull request #234 from hathach/stm32f4-blackpill
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move VBUS sense out of dcd_synosys to bsp
2019-12-12 10:00:17 +07:00
hathach
88bdb12ee5
close #204 define HSE_VALUE in _hal_conf instead of board.mk
2019-12-11 15:19:51 +07:00
hathach
96a9eca6a0
move VBUS sense out of dcd_synosys to bsp
2019-12-11 14:03:36 +07:00
hathach
f638594536
move -flto to board.mk
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current board that doesn work with flto is spresense and mimxrt10xx (due
to xip image_vector_table is optimized out).
2019-11-20 16:06:40 +07:00
hathach
6f952a8e84
fix missing board uart read/write()
2019-10-24 12:20:06 +07:00
hathach
6183dbd0ce
add -Wextra for more warnings to example
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non-stack warning (probably mcu driver) should be suppressed in the
board.mk
2019-09-27 00:15:43 +07:00
hathach
ff7261600c
ported stm32f2, added board stm32f207zg nucleo
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close #127
2019-09-12 10:41:03 +07:00