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65 lines
1.7 KiB
Makefile
65 lines
1.7 KiB
Makefile
# https://www.embecosm.com/resources/tool-chain-downloads/#riscv-stable
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#CROSS_COMPILE ?= riscv32-unknown-elf-
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# Toolchain from https://nucleisys.com/download.php
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#CROSS_COMPILE ?= riscv-nuclei-elf-
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# Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
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CROSS_COMPILE ?= riscv-none-elf-
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CH32_FAMILY = ch32v20x
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SDK_DIR = hw/mcu/wch/ch32v20x
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SDK_SRC_DIR = $(SDK_DIR)/EVT/EXAM/SRC
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include $(TOP)/$(BOARD_PATH)/board.mk
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CPU_CORE ?= rv32imac-ilp32
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# Port0 use FSDev, Port1 use USBFS
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PORT ?= 0
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CFLAGS += \
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-mcmodel=medany \
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-ffat-lto-objects \
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-flto \
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-DCH32V20x_${MCU_VARIANT} \
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-DCFG_TUSB_MCU=OPT_MCU_CH32V20X
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# https://github.com/openwch/ch32v20x/pull/12
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CFLAGS += -Wno-error=strict-prototypes
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ifeq ($(PORT),0)
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$(info "Using FSDEV driver")
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CFLAGS += -DCFG_TUD_WCH_USBIP_FSDEV=1
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else
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$(info "Using USBFS driver")
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CFLAGS += -DCFG_TUD_WCH_USBIP_USBFS=1
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endif
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LDFLAGS_GCC += \
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-nostdlib -nostartfiles \
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--specs=nosys.specs --specs=nano.specs \
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LD_FILE = $(FAMILY_PATH)/linker/${CH32_FAMILY}.ld
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SRC_C += \
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src/portable/wch/dcd_ch32_usbfs.c \
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src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
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$(SDK_SRC_DIR)/Core/core_riscv.c \
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$(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_gpio.c \
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$(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_misc.c \
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$(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_rcc.c \
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$(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_usart.c \
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SRC_S += $(SDK_SRC_DIR)/Startup/startup_${CH32_FAMILY}_${MCU_VARIANT}.S
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INC += \
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$(TOP)/$(BOARD_PATH) \
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$(TOP)/$(SDK_SRC_DIR)/Core \
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$(TOP)/$(SDK_SRC_DIR)/Peripheral/inc \
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FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
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OPENOCD_WCH_OPTION=-f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg
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flash: flash-wlink-rs
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#flash: flash-openocd-wch
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