mirror of
https://github.com/hathach/tinyusb.git
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145 lines
5.2 KiB
C
145 lines
5.2 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// UART Enable PA2 as the debug log UART
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#define UART_DEV USART2
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#define PINID_LED 0
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#define PINID_BUTTON 1
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#define PINID_UART_TX 2
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#define PINID_UART_RX 3
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#define PINID_VBUS0_EN 4
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static board_pindef_t board_pindef[] = {
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{ // LED
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.port = GPIOE,
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.pin_init = { .Pin = GPIO_PIN_2, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
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.active_state = 0
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},
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{ // BUTTON
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.port = GPIOA,
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.pin_init = { .Pin = GPIO_PIN_0, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
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.active_state = 1
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},
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{ // UART TX
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.port = GPIOA,
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.pin_init = { .Pin = GPIO_PIN_2, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = GPIO_AF7_USART2 },
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.active_state = 0
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},
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{ // UART RX
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.port = GPIOA,
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.pin_init = { .Pin = GPIO_PIN_3, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = GPIO_AF7_USART2 },
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.active_state = 0
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},
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{ // VBUS0 EN
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.port = GPIOG,
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.pin_init = { .Pin = GPIO_PIN_8, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
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.active_state = 0
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}
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};
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//--------------------------------------------------------------------+
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// RCC Clock
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//--------------------------------------------------------------------+
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static inline void board_clock_init(void) {
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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/* Enable Power Control clock */
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__HAL_RCC_PWR_CLK_ENABLE();
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/* The voltage scaling allows optimizing the power consumption when the
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* device is clocked below the maximum system frequency, to update the
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* voltage scaling value regarding system frequency refer to product
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* datasheet. */
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/* Enable HSE Oscillator and activate PLL with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
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RCC_OscInitStruct.PLL.PLLN = 200;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 7;
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RCC_OscInitStruct.PLL.PLLR = 2;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* Select PLLSAI output as USB clock source */
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PeriphClkInitStruct.PLLI2S.PLLI2SM = 8;
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PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4;
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PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CK48;
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PeriphClkInitStruct.Clk48ClockSelection = RCC_CK48CLKSOURCE_PLLI2SQ;
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PeriphClkInitStruct.PLLI2SSelection = RCC_PLLI2SCLKSOURCE_PLLSRC;
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PeriphClkInitStruct.PLLI2S.PLLI2SR = 7;
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
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/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
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* clocks dividers */
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
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RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
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// Enable clocks for Uart
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__HAL_RCC_USART2_CLK_ENABLE();
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}
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static inline void board_vbus_sense_init(uint8_t rhport) {
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if (rhport == 0) {
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// Enable VBUS sense (B device) via pin PA9
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USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
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}
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}
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static inline void board_vbus_set(uint8_t rhport, bool state) {
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if (rhport == 0) {
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board_pindef_t* pindef = &board_pindef[PINID_VBUS0_EN];
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HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, state == pindef->active_state ? GPIO_PIN_SET : GPIO_PIN_RESET);
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}
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARD_H_ */
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