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https://github.com/hathach/tinyusb.git
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494533f9d7
Correct a case-sensitive file extension issue in the MAX32690 build scripts. Did not present itself as an issue under MinGW or MSYS, just Linux.
103 lines
3.0 KiB
Makefile
103 lines
3.0 KiB
Makefile
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
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# Important locations in the hw support for MCU
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MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
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MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
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# Add any board specific make rules
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include $(TOP)/$(BOARD_PATH)/board.mk
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CPU_CORE ?= cortex-m4
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PORT ?= 0
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# GCC
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SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/GCC/startup_max32690.S
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LD_FILE = $(FAMILY_PATH)/max32690.ld
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# --------------
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# Compiler Flags
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# --------------
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# Flags for the MAX32690 SDK
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CFLAGS += -DTARGET=MAX32690 \
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-DTARGET_REV=0x4131 \
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-DMXC_ASSERT_ENABLE \
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-DMAX32690 \
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-DFLASH_ORIGIN=0x10000000 \
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-DFLASH_SIZE=0x340000 \
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-DSRAM_ORIGIN=0x20000000 \
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-DSRAM_SIZE=0x100000 \
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-DIAR_PRAGMAS=0
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# Flags for TUSB features
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CFLAGS += \
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-DCFG_TUSB_MCU=OPT_MCU_MAX32690 \
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-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
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# mcu driver cause following warnings
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CFLAGS += -Wno-error=unused-parameter \
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-Wno-error=strict-prototypes \
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-Wno-error=old-style-declaration \
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-Wno-error=sign-compare \
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-Wno-error=cast-qual \
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-Wno-lto-type-mismatch
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LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
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# For flash-jlink target
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JLINK_DEVICE = max32690
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# flash target using Jlink by default
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flash: flash-jlink
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# Optional flash option when running within an installed MSDK to use OpenOCD
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# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
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# If the MSDK is installed, flash-msdk can be run to utilize the the modified
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# openocd with the algorithms
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MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
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flash-msdk: $(BUILD)/$(PROJECT).elf
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$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
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-f interface/cmsis-dap.cfg -f target/max32690.cfg \
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-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
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# -----------------
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# Sources & Include
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# -----------------
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PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
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SRC_C += \
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src/portable/analog/max32/dcd_max32.c \
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$(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/heap.c \
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$(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/system_max32690.c \
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$(PERIPH_SRC)/SYS/mxc_assert.c \
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$(PERIPH_SRC)/SYS/mxc_delay.c \
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$(PERIPH_SRC)/SYS/mxc_lock.c \
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$(PERIPH_SRC)/SYS/nvic_table.c \
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$(PERIPH_SRC)/SYS/pins_me18.c \
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$(PERIPH_SRC)/SYS/sys_me18.c \
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$(PERIPH_SRC)/CTB/ctb_me18.c \
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$(PERIPH_SRC)/CTB/ctb_reva.c \
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$(PERIPH_SRC)/CTB/ctb_common.c \
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$(PERIPH_SRC)/FLC/flc_common.c \
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$(PERIPH_SRC)/FLC/flc_me18.c \
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$(PERIPH_SRC)/FLC/flc_reva.c \
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$(PERIPH_SRC)/GPIO/gpio_common.c \
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$(PERIPH_SRC)/GPIO/gpio_me18.c \
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$(PERIPH_SRC)/GPIO/gpio_reva.c \
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$(PERIPH_SRC)/ICC/icc_me18.c \
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$(PERIPH_SRC)/ICC/icc_reva.c \
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$(PERIPH_SRC)/UART/uart_common.c \
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$(PERIPH_SRC)/UART/uart_me18.c \
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$(PERIPH_SRC)/UART/uart_revb.c \
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INC += \
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$(TOP)/$(BOARD_PATH) \
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$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
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$(TOP)/$(MAX32_CMSIS)/Include \
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$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32690/Include \
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$(TOP)/$(MAX32_PERIPH)/Include/MAX32690 \
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$(PERIPH_SRC)/SYS \
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$(PERIPH_SRC)/GPIO \
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$(PERIPH_SRC)/CTB \
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$(PERIPH_SRC)/ICC \
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$(PERIPH_SRC)/FLC \
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$(PERIPH_SRC)/UART
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