mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-24 05:42:57 +08:00
795 lines
22 KiB
C
795 lines
22 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020 Koji Kitayama
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "tusb_option.h"
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#if TUSB_OPT_DEVICE_ENABLED && (( CFG_TUSB_MCU == OPT_MCU_RX63X ) || ( CFG_TUSB_MCU == OPT_MCU_RX72N ))
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#include "device/dcd.h"
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#include "iodefine.h"
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//--------------------------------------------------------------------+
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// MACRO TYPEDEF CONSTANT ENUM DECLARATION
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//--------------------------------------------------------------------+
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#define SYSTEM_PRCR_PRC1 (1<<1)
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#define SYSTEM_PRCR_PRKEY (0xA5u<<8)
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#define USB_FIFOSEL_TX ((uint16_t)(1u<<5))
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#define USB_FIFOSEL_BIGEND ((uint16_t)(1u<<8))
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#define USB_FIFOSEL_MBW_8 ((uint16_t)(0u<<10))
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#define USB_FIFOSEL_MBW_16 ((uint16_t)(1u<<10))
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#define USB_IS0_CTSQ ((uint16_t)(7u))
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#define USB_IS0_DVSQ ((uint16_t)(7u<<4))
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#define USB_IS0_VALID ((uint16_t)(1u<<3))
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#define USB_IS0_BRDY ((uint16_t)(1u<<8))
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#define USB_IS0_NRDY ((uint16_t)(1u<<9))
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#define USB_IS0_BEMP ((uint16_t)(1u<<10))
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#define USB_IS0_CTRT ((uint16_t)(1u<<11))
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#define USB_IS0_DVST ((uint16_t)(1u<<12))
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#define USB_IS0_SOFR ((uint16_t)(1u<<13))
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#define USB_IS0_RESM ((uint16_t)(1u<<14))
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#define USB_IS0_VBINT ((uint16_t)(1u<<15))
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#define USB_IS1_SACK ((uint16_t)(1u<<4))
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#define USB_IS1_SIGN ((uint16_t)(1u<<5))
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#define USB_IS1_EOFERR ((uint16_t)(1u<<6))
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#define USB_IS1_ATTCH ((uint16_t)(1u<<11))
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#define USB_IS1_DTCH ((uint16_t)(1u<<12))
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#define USB_IS1_BCHG ((uint16_t)(1u<<14))
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#define USB_IS1_OVRCR ((uint16_t)(1u<<15))
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#define USB_IS0_CTSQ_MSK (7u)
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#define USB_IS0_CTSQ_SETUP (1u)
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#define USB_IS0_DVSQ_DEF (1u<<4)
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#define USB_IS0_DVSQ_ADDR (2u<<4)
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#define USB_IS0_DVSQ_SUSP (4u<<4)
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#define USB_PIPECTR_PID_NAK (0u)
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#define USB_PIPECTR_PID_BUF (1u)
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#define USB_PIPECTR_PID_STALL (2u)
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#define USB_PIPECTR_CCPL (1u<<2)
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#define USB_PIPECTR_SQMON (1u<<6)
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#define USB_PIPECTR_SQCLR (1u<<8)
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#define USB_PIPECTR_ACLRM (1u<<9)
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#define USB_PIPECTR_INBUFM (1u<<14)
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#define USB_PIPECTR_BSTS (1u<<15)
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#define USB_FIFOCTR_DTLN (0x1FF)
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#define USB_FIFOCTR_FRDY (1u<<13)
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#define USB_FIFOCTR_BCLR (1u<<14)
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#define USB_FIFOCTR_BVAL (1u<<15)
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#define USB_PIPECFG_SHTNAK (1u<<7)
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#define USB_PIPECFG_DBLB (1u<<9)
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#define USB_PIPECFG_BULK (1u<<14)
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#define USB_PIPECFG_ISO (3u<<14)
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#define USB_PIPECFG_INT (2u<<14)
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#define FIFO_REQ_CLR (1u)
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#define FIFO_COMPLETE (1u<<1)
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TU_BIT_FIELD_ORDER_BEGIN
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typedef struct {
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union {
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struct {
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uint16_t : 8;
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uint16_t TRCLR: 1;
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uint16_t TRENB: 1;
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uint16_t : 0;
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};
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uint16_t TRE;
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};
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uint16_t TRN;
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} reg_pipetre_t;
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TU_BIT_FIELD_ORDER_END
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TU_BIT_FIELD_ORDER_BEGIN
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typedef union {
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struct {
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volatile uint16_t u8: 8;
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volatile uint16_t : 0;
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};
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volatile uint16_t u16;
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} hw_fifo_t;
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TU_BIT_FIELD_ORDER_END
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TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain)
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TU_BIT_FIELD_ORDER_BEGIN
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typedef struct TU_ATTR_PACKED
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{
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uintptr_t addr; /* the start address of a transfer data buffer */
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uint16_t length; /* the number of bytes in the buffer */
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uint16_t remaining; /* the number of bytes remaining in the buffer */
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struct {
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uint32_t ep : 8; /* an assigned endpoint address */
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uint32_t : 0;
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};
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} pipe_state_t;
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TU_BIT_FIELD_ORDER_END
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TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain)
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typedef struct
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{
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pipe_state_t pipe[10];
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uint8_t ep[2][16]; /* a lookup table for a pipe index from an endpoint address */
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} dcd_data_t;
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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CFG_TUSB_MEM_SECTION static dcd_data_t _dcd;
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static uint32_t disable_interrupt(void)
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{
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uint32_t pswi;
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#if defined(__CCRX__)
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pswi = get_psw() & 0x010000;
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clrpsw_i();
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#else
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pswi = __builtin_rx_mvfc(0) & 0x010000;
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__builtin_rx_clrpsw('I');
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#endif
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return pswi;
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}
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static void enable_interrupt(uint32_t pswi)
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{
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#if defined(__CCRX__)
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set_psw(get_psw() | pswi);
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#else
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__builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi);
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#endif
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}
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static unsigned find_pipe(unsigned xfer)
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{
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switch (xfer) {
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case TUSB_XFER_ISOCHRONOUS:
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for (int i = 1; i <= 2; ++i) {
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if (0 == _dcd.pipe[i].ep) return i;
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}
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break;
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case TUSB_XFER_BULK:
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for (int i = 3; i <= 5; ++i) {
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if (0 == _dcd.pipe[i].ep) return i;
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}
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for (int i = 1; i <= 1; ++i) {
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if (0 == _dcd.pipe[i].ep) return i;
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}
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break;
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case TUSB_XFER_INTERRUPT:
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for (int i = 6; i <= 9; ++i) {
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if (0 == _dcd.pipe[i].ep) return i;
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}
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break;
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default:
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/* No support for control transfer */
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break;
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}
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return 0;
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}
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static volatile uint16_t* get_pipectr(unsigned num)
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{
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volatile uint16_t *ctr = NULL;
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if (num) {
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ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
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ctr += num - 1;
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} else {
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ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
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}
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return ctr;
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}
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static volatile reg_pipetre_t* get_pipetre(unsigned num)
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{
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volatile reg_pipetre_t* tre = NULL;
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if ((1 <= num) && (num <= 5)) {
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tre = (volatile reg_pipetre_t*)&USB0.PIPE1TRE.WORD;
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tre += num - 1;
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}
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return tre;
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}
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static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr)
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{
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(void)rhport;
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volatile uint16_t *ctr = NULL;
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const unsigned epn = tu_edpt_number(ep_addr);
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if (epn) {
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const unsigned dir = tu_edpt_dir(ep_addr);
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const unsigned num = _dcd.ep[dir][epn];
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if (num) {
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ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
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ctr += num - 1;
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}
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} else {
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ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
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}
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return ctr;
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}
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static unsigned wait_for_pipe_ready(void)
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{
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unsigned ctr;
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do {
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ctr = USB0.D0FIFOCTR.WORD;
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} while (!(ctr & USB_FIFOCTR_FRDY));
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return ctr;
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}
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static unsigned select_pipe(unsigned num, unsigned attr)
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{
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USB0.PIPESEL.WORD = num;
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USB0.D0FIFOSEL.WORD = num | attr;
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while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ;
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return wait_for_pipe_ready();
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}
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/* 1 less than mps bytes were written to FIFO
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* 2 no bytes were written to FIFO
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* 0 mps bytes were written to FIFO */
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static int fifo_write(volatile void *fifo, pipe_state_t* pipe, unsigned mps)
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{
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unsigned rem = pipe->remaining;
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if (!rem) return 2;
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unsigned len = TU_MIN(rem, mps);
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hw_fifo_t *reg = (hw_fifo_t*)fifo;
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uintptr_t addr = pipe->addr + pipe->length - rem;
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while (len >= 2) {
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reg->u16 = *(const uint16_t *)addr;
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addr += 2;
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len -= 2;
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}
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if (len) {
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reg->u8 = *(const uint8_t *)addr;
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++addr;
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}
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if (rem < mps) return 1;
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return 0;
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}
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/* 1 less than mps bytes were read from FIFO
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* 2 the end of the buffer reached.
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* 0 mps bytes were read from FIFO */
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static int fifo_read(volatile void *fifo, pipe_state_t* pipe, unsigned mps, size_t len)
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{
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unsigned rem = pipe->remaining;
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if (!rem) return 2;
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if (rem < len) len = rem;
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pipe->remaining = rem - len;
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uint8_t *reg = (uint8_t*)fifo; /* byte access is always at base register address */
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uintptr_t addr = pipe->addr;
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unsigned loop = len;
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while (loop--) {
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*(uint8_t *)addr = *reg;
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++addr;
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}
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pipe->addr = addr;
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if (rem < mps) return 1;
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if (rem == len) return 2;
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return 0;
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}
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static void process_setup_packet(uint8_t rhport)
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{
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uint16_t setup_packet[4];
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if (0 == (USB0.INTSTS0.WORD & USB_IS0_VALID)) return;
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USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
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setup_packet[0] = tu_le16toh(USB0.USBREQ.WORD);
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setup_packet[1] = USB0.USBVAL;
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setup_packet[2] = USB0.USBINDX;
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setup_packet[3] = USB0.USBLENG;
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USB0.INTSTS0.WORD = ~USB_IS0_VALID;
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dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet[0], true);
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}
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static void process_status_completion(uint8_t rhport)
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{
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uint8_t ep_addr;
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/* Check the data stage direction */
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if (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) {
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/* IN transfer. */
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ep_addr = tu_edpt_addr(0, TUSB_DIR_IN);
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} else {
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/* OUT transfer. */
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ep_addr = tu_edpt_addr(0, TUSB_DIR_OUT);
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}
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dcd_event_xfer_complete(rhport, ep_addr, 0, XFER_RESULT_SUCCESS, true);
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}
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static bool process_edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
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{
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(void)rhport;
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pipe_state_t *pipe = &_dcd.pipe[0];
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/* configure fifo direction and access unit settings */
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if (ep_addr) { /* IN, 2 bytes */
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#if TU_BYTE_ORDER == TU_BIG_ENDIAN
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USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | USB_FIFOSEL_BIGEND;
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#else
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USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16;
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#endif
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while (!(USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX)) ;
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} else { /* OUT, a byte */
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USB0.CFIFOSEL.WORD = USB_FIFOSEL_MBW_8;
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while (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) ;
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}
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if (total_bytes) {
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pipe->addr = (uintptr_t)buffer;
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pipe->length = total_bytes;
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pipe->remaining = total_bytes;
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if (ep_addr) { /* IN */
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TU_ASSERT(USB0.DCPCTR.BIT.BSTS && (USB0.USBREQ.WORD & 0x80));
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if (fifo_write((void*)&USB0.CFIFO.WORD, pipe, 64)) {
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USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL;
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}
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}
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USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF;
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} else {
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/* ZLP */
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pipe->addr = 0;
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pipe->length = 0;
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pipe->remaining = 0;
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USB0.DCPCTR.WORD = USB_PIPECTR_CCPL | USB_PIPECTR_PID_BUF;
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}
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return true;
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}
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static void process_edpt0_bemp(uint8_t rhport)
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{
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pipe_state_t *pipe = &_dcd.pipe[0];
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const unsigned rem = pipe->remaining;
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if (rem > 64) {
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pipe->remaining = rem - 64;
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int r = fifo_write((void*)&USB0.CFIFO.WORD, &_dcd.pipe[0], 64);
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if (r) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL;
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return;
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}
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pipe->addr = 0;
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pipe->remaining = 0;
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dcd_event_xfer_complete(rhport, tu_edpt_addr(0, TUSB_DIR_IN),
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pipe->length, XFER_RESULT_SUCCESS, true);
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}
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static void process_edpt0_brdy(uint8_t rhport)
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{
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size_t len = USB0.CFIFOCTR.BIT.DTLN;
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int cplt = fifo_read((void*)&USB0.CFIFO.WORD, &_dcd.pipe[0], 64, len);
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if (cplt || (len < 64)) {
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if (2 != cplt) {
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USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
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}
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dcd_event_xfer_complete(rhport, tu_edpt_addr(0, TUSB_DIR_OUT),
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_dcd.pipe[0].length - _dcd.pipe[0].remaining,
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XFER_RESULT_SUCCESS, true);
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}
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}
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static bool process_pipe_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
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{
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(void)rhport;
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const unsigned epn = tu_edpt_number(ep_addr);
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const unsigned dir = tu_edpt_dir(ep_addr);
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const unsigned num = _dcd.ep[dir][epn];
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TU_ASSERT(num);
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pipe_state_t *pipe = &_dcd.pipe[num];
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pipe->addr = (uintptr_t)buffer;
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pipe->length = total_bytes;
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pipe->remaining = total_bytes;
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USB0.PIPESEL.WORD = num;
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const unsigned mps = USB0.PIPEMAXP.WORD;
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if (dir) { /* IN */
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#if TU_BYTE_ORDER == TU_BIG_ENDIAN
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USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | USB_FIFOSEL_BIGEND;
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#else
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USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16;
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#endif
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while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ;
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int r = fifo_write((void*)&USB0.D0FIFO.WORD, pipe, mps);
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if (r) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
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USB0.D0FIFOSEL.WORD = 0;
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while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
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} else {
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volatile reg_pipetre_t *pt = get_pipetre(num);
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if (pt) {
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volatile uint16_t *ctr = get_pipectr(num);
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if (*ctr & 0x3) *ctr = USB_PIPECTR_PID_NAK;
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pt->TRE = TU_BIT(8);
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pt->TRN = (total_bytes + mps - 1) / mps;
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pt->TRENB = 1;
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*ctr = USB_PIPECTR_PID_BUF;
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}
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}
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// TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
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return true;
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}
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static void process_pipe_brdy(uint8_t rhport, unsigned num)
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{
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pipe_state_t *pipe = &_dcd.pipe[num];
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if (tu_edpt_dir(pipe->ep)) { /* IN */
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#if TU_BYTE_ORDER == TU_BIG_ENDIAN
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select_pipe(num, USB_FIFOSEL_MBW_16 | USB_FIFOSEL_BIGEND);
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#else
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select_pipe(num, USB_FIFOSEL_MBW_16);
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#endif
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const unsigned mps = USB0.PIPEMAXP.WORD;
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unsigned rem = pipe->remaining;
|
|
rem -= TU_MIN(rem, mps);
|
|
pipe->remaining = rem;
|
|
if (rem) {
|
|
int r = 0;
|
|
r = fifo_write((void*)&USB0.D0FIFO.WORD, pipe, mps);
|
|
if (r) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
|
|
USB0.D0FIFOSEL.WORD = 0;
|
|
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
|
|
return;
|
|
}
|
|
USB0.D0FIFOSEL.WORD = 0;
|
|
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
|
|
pipe->addr = 0;
|
|
pipe->remaining = 0;
|
|
dcd_event_xfer_complete(rhport, pipe->ep, pipe->length,
|
|
XFER_RESULT_SUCCESS, true);
|
|
} else {
|
|
const unsigned ctr = select_pipe(num, USB_FIFOSEL_MBW_8);
|
|
const unsigned len = ctr & USB_FIFOCTR_DTLN;
|
|
const unsigned mps = USB0.PIPEMAXP.WORD;
|
|
int cplt = fifo_read((void*)&USB0.D0FIFO.WORD, pipe, mps, len);
|
|
if (cplt || (len < mps)) {
|
|
if (2 != cplt) {
|
|
USB0.D0FIFO.WORD = USB_FIFOCTR_BCLR;
|
|
}
|
|
USB0.D0FIFOSEL.WORD = 0;
|
|
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
|
|
dcd_event_xfer_complete(rhport, pipe->ep,
|
|
pipe->length - pipe->remaining,
|
|
XFER_RESULT_SUCCESS, true);
|
|
return;
|
|
}
|
|
USB0.D0FIFOSEL.WORD = 0;
|
|
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
|
|
}
|
|
}
|
|
|
|
static void process_bus_reset(uint8_t rhport)
|
|
{
|
|
USB0.BEMPENB.WORD = 1;
|
|
USB0.BRDYENB.WORD = 1;
|
|
USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
|
|
USB0.D0FIFOSEL.WORD = 0;
|
|
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
|
|
USB0.D1FIFOSEL.WORD = 0;
|
|
while (USB0.D1FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
|
|
volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t)(&USB0.PIPE1CTR.WORD));
|
|
volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t)(&USB0.PIPE1TRE.WORD));
|
|
for (int i = 1; i <= 5; ++i) {
|
|
USB0.PIPESEL.WORD = i;
|
|
USB0.PIPECFG.WORD = 0;
|
|
*ctr = USB_PIPECTR_ACLRM;
|
|
*ctr = 0;
|
|
++ctr;
|
|
*tre = TU_BIT(8);
|
|
tre += 2;
|
|
}
|
|
for (int i = 6; i <= 9; ++i) {
|
|
USB0.PIPESEL.WORD = i;
|
|
USB0.PIPECFG.WORD = 0;
|
|
*ctr = USB_PIPECTR_ACLRM;
|
|
*ctr = 0;
|
|
++ctr;
|
|
}
|
|
tu_varclr(&_dcd);
|
|
dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true);
|
|
}
|
|
|
|
static void process_set_address(uint8_t rhport)
|
|
{
|
|
const uint32_t addr = USB0.USBADDR.BIT.USBADDR;
|
|
if (!addr) return;
|
|
const tusb_control_request_t setup_packet = {
|
|
.bmRequestType = { 0 }, /* Note: CCRX needs the braces over this struct member */
|
|
.bRequest = 5,
|
|
.wValue = addr,
|
|
.wIndex = 0,
|
|
.wLength = 0,
|
|
};
|
|
dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet, true);
|
|
}
|
|
|
|
/*------------------------------------------------------------------*/
|
|
/* Device API
|
|
*------------------------------------------------------------------*/
|
|
void dcd_init(uint8_t rhport)
|
|
{
|
|
(void)rhport;
|
|
/* Enable USB0 */
|
|
uint32_t pswi = disable_interrupt();
|
|
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
|
|
MSTP(USB0) = 0;
|
|
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
|
|
enable_interrupt(pswi);
|
|
USB0.SYSCFG.BIT.SCKE = 1;
|
|
while (!USB0.SYSCFG.BIT.SCKE) ;
|
|
USB0.SYSCFG.BIT.DRPD = 0;
|
|
USB0.SYSCFG.BIT.DCFM = 0;
|
|
USB0.SYSCFG.BIT.USBE = 1;
|
|
|
|
USB.DPUSR0R.BIT.FIXPHY0 = 0u; /* USB0 Transceiver Output fixed */
|
|
#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
|
|
USB0.PHYSLEW.LONG = 0x5;
|
|
IR(PERIB, INTB185) = 0;
|
|
#else
|
|
IR(USB0, USBI0) = 0;
|
|
#endif
|
|
|
|
/* Setup default control pipe */
|
|
USB0.DCPMAXP.BIT.MXPS = 64;
|
|
USB0.INTENB0.WORD = USB_IS0_VBINT | USB_IS0_BRDY | USB_IS0_BEMP | USB_IS0_DVST | USB_IS0_CTRT;
|
|
USB0.BEMPENB.WORD = 1;
|
|
USB0.BRDYENB.WORD = 1;
|
|
|
|
if (USB0.INTSTS0.BIT.VBSTS) {
|
|
dcd_connect(rhport);
|
|
}
|
|
}
|
|
|
|
void dcd_int_enable(uint8_t rhport)
|
|
{
|
|
(void)rhport;
|
|
#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
|
|
IEN(PERIB, INTB185) = 1;
|
|
#else
|
|
IEN(USB0, USBI0) = 1;
|
|
#endif
|
|
}
|
|
|
|
void dcd_int_disable(uint8_t rhport)
|
|
{
|
|
(void)rhport;
|
|
#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
|
|
IEN(PERIB, INTB185) = 0;
|
|
#else
|
|
IEN(USB0, USBI0) = 0;
|
|
#endif
|
|
}
|
|
|
|
void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
|
|
{
|
|
(void)rhport;
|
|
(void)dev_addr;
|
|
}
|
|
|
|
void dcd_remote_wakeup(uint8_t rhport)
|
|
{
|
|
(void)rhport;
|
|
/* TODO */
|
|
}
|
|
|
|
void dcd_connect(uint8_t rhport)
|
|
{
|
|
(void)rhport;
|
|
USB0.SYSCFG.BIT.DPRPU = 1;
|
|
}
|
|
|
|
void dcd_disconnect(uint8_t rhport)
|
|
{
|
|
(void)rhport;
|
|
USB0.SYSCFG.BIT.DPRPU = 0;
|
|
}
|
|
|
|
//--------------------------------------------------------------------+
|
|
// Endpoint API
|
|
//--------------------------------------------------------------------+
|
|
bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
|
|
{
|
|
(void)rhport;
|
|
|
|
const unsigned ep_addr = ep_desc->bEndpointAddress;
|
|
const unsigned epn = tu_edpt_number(ep_addr);
|
|
const unsigned dir = tu_edpt_dir(ep_addr);
|
|
const unsigned xfer = ep_desc->bmAttributes.xfer;
|
|
|
|
const unsigned mps = tu_le16toh(ep_desc->wMaxPacketSize.size);
|
|
if (xfer == TUSB_XFER_ISOCHRONOUS && mps > 256) {
|
|
/* USBa supports up to 256 bytes */
|
|
return false;
|
|
}
|
|
|
|
const unsigned num = find_pipe(xfer);
|
|
if (!num) return false;
|
|
_dcd.pipe[num].ep = ep_addr;
|
|
_dcd.ep[dir][epn] = num;
|
|
|
|
/* setup pipe */
|
|
dcd_int_disable(rhport);
|
|
USB0.PIPESEL.WORD = num;
|
|
USB0.PIPEMAXP.WORD = mps;
|
|
volatile uint16_t *ctr = get_pipectr(num);
|
|
*ctr = USB_PIPECTR_ACLRM;
|
|
*ctr = 0;
|
|
unsigned cfg = (dir << 4) | epn;
|
|
if (xfer == TUSB_XFER_BULK) {
|
|
cfg |= USB_PIPECFG_BULK | USB_PIPECFG_SHTNAK | USB_PIPECFG_DBLB;
|
|
} else if (xfer == TUSB_XFER_INTERRUPT) {
|
|
cfg |= USB_PIPECFG_INT;
|
|
} else {
|
|
cfg |= USB_PIPECFG_ISO | USB_PIPECFG_DBLB;
|
|
}
|
|
USB0.PIPECFG.WORD = cfg;
|
|
USB0.BRDYSTS.WORD = 0x1FFu ^ TU_BIT(num);
|
|
USB0.BRDYENB.WORD |= TU_BIT(num);
|
|
if (dir || (xfer != TUSB_XFER_BULK)) {
|
|
*ctr = USB_PIPECTR_PID_BUF;
|
|
}
|
|
// TU_LOG1("O %d %x %x\r\n", USB0.PIPESEL.WORD, USB0.PIPECFG.WORD, USB0.PIPEMAXP.WORD);
|
|
dcd_int_enable(rhport);
|
|
|
|
return true;
|
|
}
|
|
|
|
void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
|
|
{
|
|
(void)rhport;
|
|
const unsigned epn = tu_edpt_number(ep_addr);
|
|
const unsigned dir = tu_edpt_dir(ep_addr);
|
|
const unsigned num = _dcd.ep[dir][epn];
|
|
|
|
USB0.BRDYENB.WORD &= ~TU_BIT(num);
|
|
volatile uint16_t *ctr = get_pipectr(num);
|
|
*ctr = 0;
|
|
USB0.PIPESEL.WORD = num;
|
|
USB0.PIPECFG.WORD = 0;
|
|
_dcd.pipe[num].ep = 0;
|
|
_dcd.ep[dir][epn] = 0;
|
|
}
|
|
|
|
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
|
|
{
|
|
bool r;
|
|
const unsigned epn = tu_edpt_number(ep_addr);
|
|
dcd_int_disable(rhport);
|
|
if (0 == epn) {
|
|
r = process_edpt0_xfer(rhport, ep_addr, buffer, total_bytes);
|
|
} else {
|
|
r = process_pipe_xfer(rhport, ep_addr, buffer, total_bytes);
|
|
}
|
|
dcd_int_enable(rhport);
|
|
return r;
|
|
}
|
|
|
|
void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
|
|
{
|
|
volatile uint16_t *ctr = ep_addr_to_pipectr(rhport, ep_addr);
|
|
if (!ctr) return;
|
|
dcd_int_disable(rhport);
|
|
const uint32_t pid = *ctr & 0x3;
|
|
*ctr = pid | USB_PIPECTR_PID_STALL;
|
|
*ctr = USB_PIPECTR_PID_STALL;
|
|
dcd_int_enable(rhport);
|
|
}
|
|
|
|
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
|
|
{
|
|
volatile uint16_t *ctr = ep_addr_to_pipectr(rhport, ep_addr);
|
|
if (!ctr) return;
|
|
dcd_int_disable(rhport);
|
|
*ctr = USB_PIPECTR_SQCLR;
|
|
|
|
if (tu_edpt_dir(ep_addr)) { /* IN */
|
|
*ctr = USB_PIPECTR_PID_BUF;
|
|
} else {
|
|
const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)];
|
|
USB0.PIPESEL.WORD = num;
|
|
if (USB0.PIPECFG.BIT.TYPE != 1) {
|
|
*ctr = USB_PIPECTR_PID_BUF;
|
|
}
|
|
}
|
|
dcd_int_enable(rhport);
|
|
}
|
|
|
|
//--------------------------------------------------------------------+
|
|
// ISR
|
|
//--------------------------------------------------------------------+
|
|
void dcd_int_handler(uint8_t rhport)
|
|
{
|
|
(void)rhport;
|
|
|
|
unsigned is0 = USB0.INTSTS0.WORD;
|
|
/* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
|
|
USB0.INTSTS0.WORD = ~((USB_IS0_CTRT | USB_IS0_DVST | USB_IS0_SOFR | USB_IS0_RESM | USB_IS0_VBINT) & is0) | USB_IS0_VALID;
|
|
if (is0 & USB_IS0_VBINT) {
|
|
if (USB0.INTSTS0.BIT.VBSTS) {
|
|
dcd_connect(rhport);
|
|
} else {
|
|
dcd_disconnect(rhport);
|
|
}
|
|
}
|
|
if (is0 & USB_IS0_DVST) {
|
|
switch (is0 & USB_IS0_DVSQ) {
|
|
case USB_IS0_DVSQ_DEF:
|
|
process_bus_reset(rhport);
|
|
break;
|
|
case USB_IS0_DVSQ_ADDR:
|
|
process_set_address(rhport);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
if (is0 & USB_IS0_CTRT) {
|
|
if (is0 & USB_IS0_CTSQ_SETUP) {
|
|
/* A setup packet has been received. */
|
|
process_setup_packet(rhport);
|
|
} else if (0 == (is0 & USB_IS0_CTSQ_MSK)) {
|
|
/* A ZLP has been sent/received. */
|
|
process_status_completion(rhport);
|
|
}
|
|
}
|
|
if (is0 & USB_IS0_BEMP) {
|
|
const unsigned s = USB0.BEMPSTS.WORD;
|
|
USB0.BEMPSTS.WORD = 0;
|
|
if (s & 1) {
|
|
process_edpt0_bemp(rhport);
|
|
}
|
|
}
|
|
if (is0 & USB_IS0_BRDY) {
|
|
const unsigned m = USB0.BRDYENB.WORD;
|
|
unsigned s = USB0.BRDYSTS.WORD & m;
|
|
/* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
|
|
USB0.BRDYSTS.WORD = ~s;
|
|
if (s & 1) {
|
|
process_edpt0_brdy(rhport);
|
|
s &= ~1;
|
|
}
|
|
while (s) {
|
|
#if defined(__CCRX__)
|
|
static const int Mod37BitPosition[] = {
|
|
-1, 0, 1, 26, 2, 23, 27, 0, 3, 16, 24, 30, 28, 11, 0, 13, 4,
|
|
7, 17, 0, 25, 22, 31, 15, 29, 10, 12, 6, 0, 21, 14, 9, 5,
|
|
20, 8, 19, 18
|
|
};
|
|
|
|
const unsigned num = Mod37BitPosition[(-s & s) % 37];
|
|
#else
|
|
const unsigned num = __builtin_ctz(s);
|
|
#endif
|
|
process_pipe_brdy(rhport, num);
|
|
s &= ~TU_BIT(num);
|
|
}
|
|
}
|
|
}
|
|
|
|
#endif
|