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159 lines
5.3 KiB
C
159 lines
5.3 KiB
C
/**************************************************************************/
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/*!
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@file hal_lpc43xx.c
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@author hathach (tinyusb.org)
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@section LICENSE
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Software License Agreement (BSD License)
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Copyright (c) 2013, hathach (tinyusb.org)
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the copyright holders nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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This file is part of the tinyusb stack.
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*/
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/**************************************************************************/
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#include "hal_usb.h"
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#include "tusb.h"
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#if TUSB_CFG_MCU == MCU_LPC43XX
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#include "lpc43xx_scu.h"
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enum {
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LPC43XX_USBMODE_DEVICE = 2,
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LPC43XX_USBMODE_HOST = 3
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};
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enum {
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LPC43XX_USBMODE_VBUS_LOW = 0,
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LPC43XX_USBMODE_VBUS_HIGH = 1
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};
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void hal_usb_int_enable(uint8_t coreid)
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{
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NVIC_EnableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
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}
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void hal_usb_int_disable(uint8_t coreid)
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{
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NVIC_DisableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
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}
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static void hal_controller_reset(uint8_t coreid)
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{ // TODO timeout expired to prevent trap
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volatile uint32_t * p_reg_usbcmd;
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p_reg_usbcmd = (coreid ? &LPC_USB1->USBCMD_D : &LPC_USB0->USBCMD_D);
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// NXP chip powered with non-host mode --> sts bit is not correctly reflected
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(*p_reg_usbcmd) |= BIT_(1);
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// timeout_timer_t timeout;
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// timeout_set(&timeout, 2); // should not take longer the time to stop controller
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while( ((*p_reg_usbcmd) & BIT_(1)) /*&& !timeout_expired(&timeout)*/) {}
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//
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// return timeout_expired(&timeout) ? TUSB_ERROR_OSAL_TIMEOUT : TUSB_ERROR_NONE;
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}
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bool hal_usb_init(void)
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{
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LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */
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//------------- USB0 -------------//
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#if TUSB_CFG_CONTROLLER_0_MODE
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CGU_EnableEntity(CGU_CLKSRC_PLL0, DISABLE); /* Disable PLL first */
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VERIFY( CGU_ERROR_SUCCESS == CGU_SetPLL0()); /* the usb core require output clock = 480MHz */
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CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_CLKSRC_PLL0);
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CGU_EnableEntity(CGU_CLKSRC_PLL0, ENABLE); /* Enable PLL after all setting is done */
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// reset controller & set role
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hal_controller_reset(0);
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#if TUSB_CFG_CONTROLLER_0_MODE & TUSB_MODE_HOST
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LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
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#else // TODO OTG
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LPC_USB0->USBMODE_D = LPC43XX_USBMODE_DEVICE;
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LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/;
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#if TUSB_CFG_DEVICE_FULLSPEED // TODO for easy testing
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LPC_USB0->PORTSC1_D |= (1<<24); // force full speed
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#endif
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#endif
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#endif
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//------------- USB1 -------------//
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#if TUSB_CFG_CONTROLLER_1_MODE
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// Host require to config P2_5, TODO confirm whether device mode require P2_5 or not
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scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // USB1_VBUS monitor presence, must be high for bus reset occur
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/* connect CLK_USB1 to 60 MHz clock */
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CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_USB1); /* FIXME Run base BASE_USB1_CLK clock from PLL1 (assume PLL1 is 60 MHz, no division required) */
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LPC_SCU->SFSUSB = (TUSB_CFG_CONTROLLER_1_MODE & TUSB_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
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hal_controller_reset(1);
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#if TUSB_CFG_CONTROLLER_1_MODE & TUSB_MODE_HOST
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LPC_USB1->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
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#else // TODO OTG
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LPC_USB1->USBMODE_D = LPC43XX_USBMODE_DEVICE;
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#endif
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LPC_USB1->PORTSC1_D |= (1<<24); // TODO abstract, force port to fullspeed
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#endif
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return true;
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}
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void hal_dcd_isr(uint8_t coreid);
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#if TUSB_CFG_CONTROLLER_0_MODE
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void USB0_IRQHandler(void)
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{
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#if MODE_HOST_SUPPORTED
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hal_hcd_isr(0);
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#endif
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#if MODE_DEVICE_SUPPORTED
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hal_dcd_isr(0);
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#endif
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}
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#endif
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#if TUSB_CFG_CONTROLLER_1_MODE
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void USB1_IRQHandler(void)
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{
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#if MODE_HOST_SUPPORTED
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hal_hcd_isr(1);
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#endif
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#if MODE_DEVICE_SUPPORTED
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hal_dcd_isr(1);
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#endif
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}
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#endif
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#endif
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