mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
135 lines
4.8 KiB
C
135 lines
4.8 KiB
C
/*
|
|
* The MIT License (MIT)
|
|
*
|
|
* Copyright (c) 2020, Ha Thach (tinyusb.org)
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
* in the Software without restriction, including without limitation the rights
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
* furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in
|
|
* all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
* THE SOFTWARE.
|
|
*
|
|
* This file is part of the TinyUSB stack.
|
|
*/
|
|
|
|
#ifndef BOARD_H_
|
|
#define BOARD_H_
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
// G474RE Nucleo does not has usb connection. We need to manually connect
|
|
// - PA12 for D+, CN10.12
|
|
// - PA11 for D-, CN10.14
|
|
|
|
// LED
|
|
#define LED_PORT GPIOA
|
|
#define LED_PIN GPIO_PIN_5
|
|
#define LED_STATE_ON 0
|
|
|
|
// Button
|
|
#define BUTTON_PORT GPIOC
|
|
#define BUTTON_PIN GPIO_PIN_13
|
|
#define BUTTON_STATE_ACTIVE 1
|
|
|
|
// UART Enable for STLink VCOM
|
|
#define UART_DEV LPUART1
|
|
#define UART_CLK_EN __HAL_RCC_LPUART1_CLK_ENABLE
|
|
#define UART_GPIO_PORT GPIOA
|
|
#define UART_GPIO_AF GPIO_AF12_LPUART1
|
|
#define UART_TX_PIN GPIO_PIN_2
|
|
#define UART_RX_PIN GPIO_PIN_3
|
|
|
|
|
|
//--------------------------------------------------------------------+
|
|
// RCC Clock
|
|
//--------------------------------------------------------------------+
|
|
static inline void board_clock_init(void)
|
|
{
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
|
|
|
// Configure the main internal regulator output voltage
|
|
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
|
|
|
|
// Initializes the CPU, AHB and APB buses clocks
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
|
|
RCC_OscInitStruct.PLL.PLLN = 50;
|
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
|
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
|
|
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
|
|
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
|
|
|
// Initializes the CPU, AHB and APB buses clocks
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
|
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8);
|
|
|
|
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
|
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
|
|
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) ;
|
|
|
|
#if 0 // TODO need to check if USB clock is enabled
|
|
/* Enable HSI48 */
|
|
memset(&RCC_OscInitStruct, 0, sizeof(RCC_OscInitStruct));
|
|
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
|
|
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
|
|
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
|
|
|
/*Enable CRS Clock*/
|
|
RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
|
|
__HAL_RCC_CRS_CLK_ENABLE();
|
|
|
|
/* Default Synchro Signal division factor (not divided) */
|
|
RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
|
|
|
|
/* Set the SYNCSRC[1:0] bits according to CRS_Source value */
|
|
RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
|
|
|
|
/* HSI48 is synchronized with USB SOF at 1KHz rate */
|
|
RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
|
|
RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
|
|
|
|
/* Set the TRIM[5:0] to the default value */
|
|
RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
|
|
|
|
/* Start automatic synchronization */
|
|
HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
|
|
#endif
|
|
}
|
|
|
|
static inline void board_vbus_sense_init(void)
|
|
{
|
|
// Enable VBUS sense (B device) via pin PA9
|
|
}
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* BOARD_H_ */
|