mirror of
https://github.com/hathach/tinyusb.git
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256 lines
7.2 KiB
C
256 lines
7.2 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021, Koji Kitayama
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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/* How to connect JLink and GR-CITRUS
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*
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* GR-CITRUS needs to solder some pads to enable JTAG interface.
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* - Short the following pads individually with solder.
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* - J4
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* - J5
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* - Short EMLE pad and 3.3V(GR-CITRUS pin name) with a wire.
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*
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* The pads are [the back side of GR-CITRUS](https://www.slideshare.net/MinaoYamamoto/grcitrusrx631/2).
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*
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* Connet the pins between GR-CITRUS and JLink as follows.
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*
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* | JTAG Function | GR-CITRUS pin name| JLink pin No.| note |
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* |:-------------:|:-----------------:|:------------:|:--------:|
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* | VTref | 3.3V | 1 | |
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* | TRST | 5 | 3 | |
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* | GND | GND | 4 | |
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* | TDI | 3 | 5 | |
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* | TMS | 2 | 7 | |
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* | TCK | 14 | 9 | short J4 |
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* | TDO | 9 | 13 | short J5 |
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* | nRES | RST | 15 | |
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*
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* JLink firmware needs to update to V6.96 or newer version to avoid
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* [a bug](https://forum.segger.com/index.php/Thread/7758-SOLVED-Bug-in-JLink-from-V6-88b-regarding-RX65N)
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* regarding downloading.
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*
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* When using SEGGER RTT, `RX_NEWLIB=0` should be added to make command arguments.
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* The option is used to change the C runtime library to `optlib` from `newlib`.
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* RTT may not work with `newlib`.
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*/
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#include "../board.h"
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#include "iodefine.h"
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#include "interrupt_handlers.h"
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#define IRQ_PRIORITY_CMT0 5
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#define IRQ_PRIORITY_USBI0 6
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#define IRQ_PRIORITY_SCI0 5
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#define SYSTEM_PRCR_PRC1 (1<<1)
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#define SYSTEM_PRCR_PRKEY (0xA5u<<8)
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#define CMT_PCLK 48000000
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#define CMT_CMCR_CKS_DIV_128 2
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#define CMT_CMCR_CMIE (1<<6)
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#define MPC_PFS_ISEL (1<<6)
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#define SCI_PCLK 48000000
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#define SCI_SSR_FER (1<<4)
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#define SCI_SSR_ORER (1<<5)
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#define SCI_SCR_TEIE (1u<<2)
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#define SCI_SCR_RE (1u<<4)
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#define SCI_SCR_TE (1u<<5)
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#define SCI_SCR_RIE (1u<<6)
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#define SCI_SCR_TIE (1u<<7)
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//--------------------------------------------------------------------+
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// SCI0 handling
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//--------------------------------------------------------------------+
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typedef struct {
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uint8_t *buf;
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uint32_t cnt;
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} sci_buf_t;
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static volatile sci_buf_t sci0_buf[2];
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void INT_Excep_SCI0_TXI0(void)
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{
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uint8_t *buf = sci0_buf[0].buf;
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uint32_t cnt = sci0_buf[0].cnt;
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if (!buf || !cnt) {
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SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
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return;
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}
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SCI0.TDR = *buf;
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if (--cnt) {
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++buf;
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} else {
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buf = NULL;
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SCI0.SCR.BIT.TIE = 0;
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SCI0.SCR.BIT.TEIE = 1;
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}
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sci0_buf[0].buf = buf;
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sci0_buf[0].cnt = cnt;
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}
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void INT_Excep_SCI0_TEI0(void)
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{
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SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
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}
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void INT_Excep_SCI0_RXI0(void)
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{
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uint8_t *buf = sci0_buf[1].buf;
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uint32_t cnt = sci0_buf[1].cnt;
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if (!buf || !cnt ||
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(SCI0.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) {
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sci0_buf[1].buf = NULL;
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SCI0.SSR.BYTE = 0;
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SCI0.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE);
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return;
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}
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*buf = SCI0.RDR;
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if (--cnt) {
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++buf;
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} else {
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buf = NULL;
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SCI0.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE);
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}
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sci0_buf[1].buf = buf;
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sci0_buf[1].cnt = cnt;
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}
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//--------------------------------------------------------------------+
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// Forward USB interrupt events to TinyUSB IRQ Handler
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//--------------------------------------------------------------------+
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void INT_Excep_USB0_USBI0(void)
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{
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tud_int_handler(0);
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}
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void board_init(void)
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{
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#if CFG_TUSB_OS == OPT_OS_NONE
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/* Enable CMT0 */
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SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
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MSTP(CMT0) = 0;
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SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
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/* Setup 1ms tick timer */
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CMT0.CMCNT = 0;
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CMT0.CMCOR = CMT_PCLK / 1000 / 128;
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CMT0.CMCR.WORD = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128;
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IR(CMT0, CMI0) = 0;
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IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0;
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IEN(CMT0, CMI0) = 1;
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CMT.CMSTR0.BIT.STR0 = 1;
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#endif
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/* Unlock MPC registers */
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MPC.PWPR.BIT.B0WI = 0;
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MPC.PWPR.BIT.PFSWE = 1;
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/* LED PA0 */
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PORTA.PMR.BIT.B0 = 0U;
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PORTA.PODR.BIT.B0 = 0U;
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PORTA.PDR.BIT.B0 = 1U;
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/* UART TXD0 => P20, RXD0 => P21 */
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PORT2.PMR.BIT.B0 = 1U;
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PORT2.PCR.BIT.B0 = 1U;
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MPC.P20PFS.BYTE = 0b01010;
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PORT2.PMR.BIT.B1 = 1U;
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MPC.P21PFS.BYTE = 0b01010;
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/* USB VBUS -> P16 DPUPE -> P14 */
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PORT1.PMR.BIT.B4 = 1U;
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PORT1.PMR.BIT.B6 = 1U;
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MPC.P14PFS.BYTE = 0b10001;
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MPC.P16PFS.BYTE = MPC_PFS_ISEL | 0b10001;
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MPC.PFUSB0.BIT.PUPHZS = 1;
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/* Lock MPC registers */
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MPC.PWPR.BIT.PFSWE = 0;
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MPC.PWPR.BIT.B0WI = 1;
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IR(USB0, USBI0) = 0;
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IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0;
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/* Enable SCI0 */
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SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
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MSTP(SCI0) = 0;
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SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
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SCI0.BRR = (SCI_PCLK / (32 * 115200)) - 1;
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IR(SCI0, RXI0) = 0;
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IR(SCI0, TXI0) = 0;
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IR(SCI0, TEI0) = 0;
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IPR(SCI0, RXI0) = IRQ_PRIORITY_SCI0;
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IPR(SCI0, TXI0) = IRQ_PRIORITY_SCI0;
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IPR(SCI0, TEI0) = IRQ_PRIORITY_SCI0;
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IEN(SCI0, RXI0) = 1;
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IEN(SCI0, TXI0) = 1;
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IEN(SCI0, TEI0) = 1;
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}
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//--------------------------------------------------------------------+
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// Board porting API
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//--------------------------------------------------------------------+
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void board_led_write(bool state)
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{
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PORTA.PODR.BIT.B0 = state ? 1 : 0;
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}
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uint32_t board_button_read(void)
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{
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return 0;
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}
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int board_uart_read(uint8_t* buf, int len)
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{
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sci0_buf[1].buf = buf;
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sci0_buf[1].cnt = len;
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SCI0.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE;
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while (SCI0.SCR.BIT.RE) ;
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return len - sci0_buf[1].cnt;
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}
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int board_uart_write(void const *buf, int len)
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{
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sci0_buf[0].buf = (uint8_t*)buf;
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sci0_buf[0].cnt = len;
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SCI0.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE;
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while (SCI0.SCR.BIT.TE) ;
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return len;
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}
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#if CFG_TUSB_OS == OPT_OS_NONE
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volatile uint32_t system_ticks = 0;
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void INT_Excep_CMT0_CMI0(void)
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{
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++system_ticks;
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}
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uint32_t board_millis(void)
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{
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return system_ticks;
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}
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#else
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uint32_t SystemCoreClock = 96000000;
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#endif
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