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https://github.com/hathach/tinyusb.git
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3e2ea77506
* change concurrency group to ${{ github.workflow }}-${{ github.ref }}
* use argparse for build.py hil_test.py, remove the need to install click
* move ci win/mac to build_cmake.yml
* rename build_family.yml to build_util.yml
* build_util.yml support esp32
* integrate build-espressif into build.yml
* build.py support make with --board option
* add get_deps action
* update hil test to reuse action
39 lines
1.1 KiB
Makefile
39 lines
1.1 KiB
Makefile
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
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MCU_DIR = hw/mcu/nxp/lpcopen/lpc40xx/lpc_chip_40xx
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include $(TOP)/$(BOARD_PATH)/board.mk
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CPU_CORE ?= cortex-m4
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CFLAGS += \
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-flto \
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-nostdlib \
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-DCORE_M4 \
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-D__USE_LPCOPEN \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
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-DCFG_TUSB_MCU=OPT_MCU_LPC40XX
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# mcu driver cause following warnings
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CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
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LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
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# All source paths should be relative to the top level.
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SRC_C += \
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src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
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src/portable/nxp/lpc17_40/hcd_lpc17_40.c \
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src/portable/ohci/ohci.c \
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$(MCU_DIR)/../gcc/cr_startup_lpc40xx.c \
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$(MCU_DIR)/src/chip_17xx_40xx.c \
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$(MCU_DIR)/src/clock_17xx_40xx.c \
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$(MCU_DIR)/src/fpu_init.c \
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$(MCU_DIR)/src/gpio_17xx_40xx.c \
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$(MCU_DIR)/src/iocon_17xx_40xx.c \
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$(MCU_DIR)/src/sysctl_17xx_40xx.c \
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$(MCU_DIR)/src/sysinit_17xx_40xx.c \
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$(MCU_DIR)/src/uart_17xx_40xx.c \
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INC += \
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$(TOP)/$(MCU_DIR)/inc \
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$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
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$(TOP)/$(BOARD_PATH)
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