# -------------------------------------------------------------------------- # # # Copyright (C) 1991-2013 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any output files from any of the foregoing # (including device programming or simulation files), and any # associated documentation or information are expressly subject # to the terms and conditions of the Altera Program License # Subscription Agreement, Altera MegaCore Function License # Agreement, or other applicable license agreement, including, # without limitation, that your use is for the sole purpose of # programming logic devices manufactured by Altera and sold by # Altera or its authorized distributors. Please refer to the # applicable agreement for further details. # # -------------------------------------------------------------------------- # # # Quartus II 64-Bit # Version 13.1.0 Build 162 10/23/2013 SJ Full Version # Date created = 21:02:52 January 17, 2021 # # -------------------------------------------------------------------------- # # # Notes: # # 1) The default values for assignments are stored in the file: # ddr_test_assignment_defaults.qdf # If this file doesn't exist, see file: # assignment_defaults.qdf # # 2) Altera recommends that you do not modify this file. This # file is updated automatically by the Quartus II software # and any changes you make may be lost or overwritten. # # -------------------------------------------------------------------------- # set_global_assignment -name FAMILY "Cyclone IV E" set_global_assignment -name DEVICE EP4CE6E22C8 set_global_assignment -name TOP_LEVEL_ENTITY fpga_top set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1 set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:02:52 JANUARY 17, 2021" set_global_assignment -name LAST_QUARTUS_VERSION 13.1 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V" set_location_assignment PIN_23 -to clk50m set_location_assignment PIN_10 -to ddr_cs_n set_location_assignment PIN_30 -to ddr_ras_n set_location_assignment PIN_31 -to ddr_cas_n set_location_assignment PIN_32 -to ddr_we_n set_location_assignment PIN_86 -to ddr_cke set_location_assignment PIN_85 -to ddr_ck_p set_location_assignment PIN_84 -to ddr_ck_n set_location_assignment PIN_7 -to ddr_ba[0] set_location_assignment PIN_3 -to ddr_ba[1] set_location_assignment PIN_1 -to ddr_a[0] set_location_assignment PIN_144 -to ddr_a[1] set_location_assignment PIN_143 -to ddr_a[2] set_location_assignment PIN_142 -to ddr_a[3] set_location_assignment PIN_106 -to ddr_a[4] set_location_assignment PIN_105 -to ddr_a[5] set_location_assignment PIN_104 -to ddr_a[6] set_location_assignment PIN_103 -to ddr_a[7] set_location_assignment PIN_100 -to ddr_a[8] set_location_assignment PIN_99 -to ddr_a[9] set_location_assignment PIN_2 -to ddr_a[10] set_location_assignment PIN_98 -to ddr_a[11] set_location_assignment PIN_87 -to ddr_a[12] set_location_assignment PIN_83 -to ddr_dm[0] set_location_assignment PIN_80 -to ddr_dqs[0] set_location_assignment PIN_38 -to ddr_dq[0] set_location_assignment PIN_39 -to ddr_dq[1] set_location_assignment PIN_34 -to ddr_dq[2] set_location_assignment PIN_33 -to ddr_dq[3] set_location_assignment PIN_76 -to ddr_dq[4] set_location_assignment PIN_75 -to ddr_dq[5] set_location_assignment PIN_74 -to ddr_dq[6] set_location_assignment PIN_73 -to ddr_dq[7] set_location_assignment PIN_42 -to error set_location_assignment PIN_141 -to error_cnt[0] set_location_assignment PIN_138 -to error_cnt[1] set_location_assignment PIN_137 -to error_cnt[2] set_location_assignment PIN_136 -to error_cnt[3] set_location_assignment PIN_135 -to error_cnt[4] set_location_assignment PIN_133 -to error_cnt[5] set_location_assignment PIN_132 -to error_cnt[6] set_location_assignment PIN_129 -to error_cnt[7] set_location_assignment PIN_128 -to error_cnt[8] set_location_assignment PIN_127 -to error_cnt[9] set_location_assignment PIN_126 -to error_cnt[10] set_location_assignment PIN_125 -to error_cnt[11] set_location_assignment PIN_124 -to error_cnt[12] set_location_assignment PIN_121 -to error_cnt[13] set_location_assignment PIN_120 -to error_cnt[14] set_location_assignment PIN_119 -to error_cnt[15] set_global_assignment -name ENABLE_SIGNALTAP ON set_global_assignment -name USE_SIGNALTAP_FILE SignalTap/stp1.stp set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_BLOCK_TYPE=AUTO" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=1" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=00000000000000000000000000" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=26" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=0" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=512" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_FLOW_USE_GENERATED=0" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_BITS=11" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=1" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=512" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "ddr_ctrl:ddr_ctrl_i|clk2" -section_id auto_signaltap_0 set_global_assignment -name VERILOG_FILE fpga_top.v set_global_assignment -name VERILOG_FILE axi_self_test_master.v set_global_assignment -name VERILOG_FILE ../RTL/ddr_sdram_ctrl.v set_global_assignment -name SIGNALTAP_FILE SignalTap/stp1.stp set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to error -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to ddr_a[0] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to ddr_a[10] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to ddr_a[11] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to ddr_a[12] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to ddr_a[1] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to ddr_a[2] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to ddr_a[3] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to ddr_a[4] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to ddr_a[5] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to ddr_a[6] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to ddr_a[7] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to ddr_a[8] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to ddr_a[9] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to ddr_ba[0] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to ddr_ba[1] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to ddr_cas_n -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to ddr_ck_p -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to ddr_cs_n -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to ddr_ras_n -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to ddr_we_n -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to error -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to error_cnt[0] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to error_cnt[10] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to error_cnt[11] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to error_cnt[12] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to error_cnt[13] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to error_cnt[14] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to error_cnt[15] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to error_cnt[1] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to error_cnt[2] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to error_cnt[3] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to error_cnt[4] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to error_cnt[5] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to error_cnt[6] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to error_cnt[7] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to error_cnt[8] -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to error_cnt[9] -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=37" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=45013" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=22477" -section_id auto_signaltap_0 set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_global_assignment -name SLD_FILE db/stp1_auto_stripped.stp set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top