mirror of
https://github.com/WangXuan95/FTDI-245fifo-interface.git
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34 lines
1.5 KiB
Python
34 lines
1.5 KiB
Python
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#-*- coding:utf-8 -*-
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# Python3
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#
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# This program is a test of FPGA+FTDI USB chips (FT232H, FT600, or FT601)
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# It sends 16 bytes to FTDI chip. The FPGA immediately returns these data (loopback).
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# The program will receive these bytes (they should be as same as the sended 16 bytes)
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#
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# The corresponding FPGA top-level design can be found in fpga_top_ft232h_loopback.v (if you are using FT232H or FT2232H chips)
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# Or see fpga_top_ft600_loopback.v (if you are using an FT600 chip)
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#
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from USB_FTX232H_FT60X import USB_FTX232H_FT60X_sync245mode # see USB_FTX232H_FT60X.py
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if __name__ == '__main__':
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usb = USB_FTX232H_FT60X_sync245mode(device_to_open_list =
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(('FTX232H', 'USB <-> Serial Converter' ), # firstly try to open FTX232H (FT232H or FT2232H) device named 'USB <-> Serial Converter'. Note that 'USB <-> Serial Converter' is the default name of FT232H or FT2232H chip unless the user has modified it. If the chip's name has been modified, you can use FT_Prog software to look up it.
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('FT60X' , 'FTDI SuperSpeed-FIFO Bridge')) # secondly try to open FT60X (FT600 or FT601) device named 'FTDI SuperSpeed-FIFO Bridge'. Note that 'FTDI SuperSpeed-FIFO Bridge' is the default name of FT600 or FT601 chip unless the user has modified it.
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)
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txlen = usb.send(b'0123456789abcdef')
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print("%d B sent" % txlen)
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data = usb.recv(txlen*2)
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print("recv %d B : %s" % (len(data), str(data)) )
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usb.close()
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