FpOC/SIM/tb_svpwm_run_iverilog.bat

mirror of https://github.com/WangXuan95/FpOC.git synced 2025-01-17 23:22:52 +08:00
del sim.out dump.vcd
iverilog  -g2001  -o sim.out  tb_svpwm.v  ../RTL/foc/sincos.v  ../RTL/foc/cartesian2polar.v  ../RTL/foc/svpwm.v
vvp -n sim.out
del sim.out
pause
update 2022-04-01 05:22:10 +08:00			`del sim.out dump.vcd`
change to Verilog2001 2023-06-09 20:54:43 +08:00			`iverilog -g2001 -o sim.out tb_svpwm.v ../RTL/foc/sincos.v ../RTL/foc/cartesian2polar.v ../RTL/foc/svpwm.v`
update 2022-04-01 05:22:10 +08:00			`vvp -n sim.out`
			`del sim.out`
			`pause`