From c2a5cc679b5b97dfbe050455321d2b9295209e1f Mon Sep 17 00:00:00 2001 From: WangXuan95 <629708558@qq.com> Date: Wed, 7 Jun 2023 20:54:14 +0800 Subject: [PATCH] change to Verilog2001 --- README.md | 345 ++++++------ RTL/{hard_png.sv => hard_png.v} | 507 ++++++++++-------- RTL/{huffman_builder.sv => huffman_builder.v} | 155 +++--- RTL/{huffman_decoder.sv => huffman_decoder.v} | 40 +- SIM/{tb_hard_png.sv => tb_hard_png.v} | 26 +- SIM/tb_hard_png_run_iverilog.bat | 2 +- figures/diagram.png | Bin 13048 -> 8367 bytes figures/interface.png | Bin 27038 -> 10876 bytes figures/wave1.png | Bin 15430 -> 5734 bytes figures/wave2.png | Bin 33393 -> 12517 bytes 10 files changed, 580 insertions(+), 495 deletions(-) rename RTL/{hard_png.sv => hard_png.v} (84%) rename RTL/{huffman_builder.sv => huffman_builder.v} (54%) rename RTL/{huffman_decoder.sv => huffman_decoder.v} (65%) rename SIM/{tb_hard_png.sv => tb_hard_png.v} (88%) diff --git a/README.md b/README.md index afdc4bc..4a21957 100644 --- a/README.md +++ b/README.md @@ -1,8 +1,168 @@ -![语言](https://img.shields.io/badge/语言-systemverilog_(IEEE1800_2005)-CAD09D.svg) ![仿真](https://img.shields.io/badge/仿真-iverilog-green.svg) ![部署](https://img.shields.io/badge/部署-quartus-blue.svg) ![部署](https://img.shields.io/badge/部署-vivado-FF1010.svg) +![语言](https://img.shields.io/badge/语言-verilog_(IEEE1364_2001)-9A90FD.svg) ![仿真](https://img.shields.io/badge/仿真-iverilog-green.svg) ![部署](https://img.shields.io/badge/部署-quartus-blue.svg) ![部署](https://img.shields.io/badge/部署-vivado-FF1010.svg) -中文 | [English](#en) +[English](#en) | [中文](#cn) -Hard-PNG +　 + +Hard-PNG +=========================== + +FPGA-based streaming **png** image decoder, input png stream, output original pixels. + +* Support image width less than 4000, height unlimited. +* **Supports all color types** : Grayscale, Grayscale+A, RGB, Indexed RGB, and RGB+A. +* Only 8bit depth is supported (actually most png images are 8bit depth). + +| ![diagram](./figures/diagram.png) | +| :--------------------------------: | +| **Figure1** : diagram of Hard-PNG. | + +　 + +# Background + +**png** is the second most common compressed image compression format after **jpg** . + +png image files have the **.png** suffix name. + +Take [SIM/test_image/img01.png](./SIM/test_image) in this repository as an example, it contains 98 bytes, which are called png stream. We can use [WinHex software](http://www.x-ways.net/winhex/) to view these bytes: + +``` +0x89, 0x50, 0x4E, 0x47, 0x0D, 0x0A, ...... , 0xAE, 0x42, 0x60, 0x82 +``` + +After the png stream is decompressed, the original pixels will be generated. This is a small image with only 4 columns and 2 rows, and a total of 8 pixels. The hexadecimal representation of these pixels is as follows. where R, G, B, A represent the red, green, blue and transparent channels of the pixel, respectively. + +| | 列 1 | 列 2 | 列 3 | 列 4 | +| :--: | :-----------------: | :-----------------: | :-----------------: | :-----------------: | +| 行 1 | R:FF G:F2 B:00 A:FF | R:ED G:1C B:24 A:FF | R:00 G:00 B:00 A:FF | R:3F G:48 B:CC A:FF | +| 行 2 | R:7F G:7F B:7F A:FF | R:ED G:1C B:24 A:FF | R:FF G:FF B:FF A:FF | R:FF G:AE B:CC A:FF | + +　 + +# Hard-PNG Usage + +[hard_png.v](./RTL) in [RTL](./RTL) directory is a module that can input png stream and output decompressed original pixels. Its interface is shown in **Figure2**. + +| ![接口图](./figures/interface.png) | +| :--------------------------------: | +| **Figure2** : ports of hard_png. | + +## Input png stream + +It's easy to use hard_png module. Take the image [SIM/test_image/img01.png](./SIM/test_image) as an example again, such as **Figure3**, before inputting the png stream, a high level pulse must be generated on `istart` (with a width of at least one clock cycle), and then input the png stream through `ivalid` and `ibyte` signals (the png stream of this image has 98 bytes, these 98 bytes must be input to hard_png one by one), among which `ivalid` and `iready` constitutes handshake signals: `ivalid=1` indicates that the user wants to send a byte to hard_png. `iready=1` indicates that hard_png is ready to accept a byte. Only when `ivalid` and `iready` both = 1 at the same time, the handshake is successful, and `ibyte` is successfully input into hard_png. + +| ![输入时序图](./figures/wave1.png) | +| :---------------------------------------: | +| **Figure3** : input waveform of hard_png. | + +When it finish to input one png image, the next png image can be input immediately or later (that is, pulse the `istart` again, and then input the next png stream). + +## Output image information and pixels + +At the same time of inputting the png stream, the decompression result of this image (including the basic information of this image and the original pixels) will be output from the module, as shown in **Figure4**, first of all, `ostart` signal will appear A high-level pulse for one cycle, and `colortype`, `width`, and `height` will be valid simutinously, where: + +- `width`, `height` are the width and height of the image. +- `colortype` is the color type of the png image, with the meaning in the table below. + +| colortype | 3'd0 | 3'd1 | 3'd2 | 3'd3 | 3‘d4 | +| :-------: | :-----------: | :---------: | :-----------: | :-----: | :-----------: | +| meaning | grayscale | grayscale+A | RGB | RGB+A | indexed RGB | +| remark | R=G=B，A=0xFF | R=G=B≠A | R≠G≠B，A=0xFF | R≠G≠B≠A | R≠G≠B，A=0xFF | + +Then, `ovalid=1` means that there is a pixel output in this cycle, meanwhile, the R, G, B, A channels of this pixel will appear on `opixelr`, `opixelg`, `opixelb`, and `opixela` signals respectively. + +| ![输出时序图](./figures/wave2.png) | +| :----------------------------------------: | +| **Figure4** : output waveform of hard_png. | + +　 + +# RTL Simulation + +Simulation related files are in the [SIM](./SIM) folder, where: + +- 14 png image files of different sizes and different color types are provided in [test_image](./SIM/test_image) folder. +- tb_hard_png.v is the testbench code that compresses these images in sequence and writes the result (raw pixels) to txt files. +- tb_hard_png_run_iverilog.bat is the command script to run iverilog simulation. +- validation.py (a Python code) compares the simulation output with the result of the software png decoding to verify the correctness. + +Before using iverilog for simulation, you need to install iverilog , see: [iverilog_usage](https://github.com/WangXuan95/WangXuan95/blob/main/iverilog_usage/iverilog_usage.md) + +Then double-click tb_hard_png_run_iverilog.bat to run the simulation, which will run for about 30 minutes (it can be forced to close halfway, but the generated simulation waveform is incomplete). + +After the simulation runs, you can open the generated dump.vcd file to view the waveform. + +In addition, each png image will generate a corresponding .txt file, which contains the decoding result. For example, img01.png generates out01.txt, which contains the decoded 8 pixel values: + +``` +decode result: colortype:3 width:4 height:2 +fff200ff ed1c24ff 000000ff 3f48ccff 7f7f7fff ed1c24ff ffffffff ffaec9ff +``` + +## Correctness verification + +In order to verify that the decompression results are correct, I provide a Python program [validation.py](./SIM), which can decompress the .png file and compares it with each pixel in the .txt file generated by the simulation. If the comparison results are the same, the validation passed. + +In order to run validation.py , you need to install Python3 and its [numpy](https://pypi.org/project/numpy/) and [PIL](https://pypi.org/project/Pillow/) libraries. + +Then, run validation.py by this command: + +``` +python validation.py test_image/img03.png out03.txt +``` + +The meaning of this command is: Compare each pixel in [out03.txt]() to see if it matches [test_image/img03.png](). The print is as follows (indicating that the verification passed): + +``` +size1= (400, 4) +size2= (400, 4) +total 400 pixels validation successful!! +``` + +　 + +# FPGA Deployment + +## FPGA resource usage + +| FPGA chip | Logic | Logic (%) | BRAM | BRAM (%) | max clk freq. (under timing closure) | +| :----------------------------: | :------: | :-------: | :--------: | :------: | :----------------------------------: | +| Xilinx Artix-7 XC7A35T | 2662×LUT | 13% | 22×BRAM36K | 44% | 66.6 Mhz | +| Altera Cyclone IV EP4CE40F23C6 | 5277×LE | 13% | 427kbit | 37% | 56 MHz | + +## Performance + +When running at 50MHz, according to the number of clock cycles consumed by each image during simulation, we can calculate the performance. + +For example, for some of the test files I provided, performance examples are shown below. + +| png file | color type | image size | pixel count | png stream size | cycle count | time | +| :-------: | :---------: | :--------: | :---------: | :-------------: | :---------: | :---: | +| img05.png | RGB | 300x256 | 76800 | 96536 | 1105702 | 23ms | +| img06.png | Grayscale | 300x263 | 78900 | 37283 | 395335 | 8ms | +| img09.png | RGBA | 300x263 | 78900 | 125218 | 1382303 | 28ms | +| img10.png | Indexed RGB | 631x742 | 468202 | 193489 | 2374224 | 48ms | +| img14.png | Indexed RGB | 1920x1080 | 2073600 | 818885 | 10177644 | 204ms | + +　 + + +# Reference + +* [upng](https://github.com/elanthis/upng): A lightweight C language png decoding library. +* [TinyPNG](https://tinypng.com/): A lossy compression tool using png's indexed RGB. +* [PNG Specification](https://www.w3.org/TR/REC-png.pdf). + +　 + +　 + +　 + +　 + +Hard-PNG =========================== 基于FPGA的流式的 **png** 图象解码器，输入 png 码流，输出原始像素 @@ -15,29 +175,29 @@ Hard-PNG | :----: | | **图1** : Hard-PNG 原理框图 | - +　 # 背景知识 -png 是仅次于jpg的第二常见的图象压缩格式。png支持透明通道（A通道），支持无损压缩，支持索引RGB（基于调色板的有损压缩）。在色彩丰富的数码照片中，png只能获得1~4倍的压缩比。在人工合成图（例如平面设计）中，png能获得10倍以上的压缩比。 +png 是仅次于jpg的第二常见的图象压缩格式。png支持透明通道（A通道），支持无损压缩，支持索引RGB（基于调色板的有损压缩）。png 图像文件的扩展名为 .png 。 -png 图像文件的扩展名为 .png 。以本库中的 SIM/test_image/img01.png 为例，它包含98字节，这98字节就称为 png 码流。我们可以用 [WinHex软件](http://www.x-ways.net/winhex/) 查看到这些字节： +以本库中的 SIM/test_image/img01.png 为例，它包含98字节，这98字节就称为 png 码流。我们可以用 [WinHex软件](http://www.x-ways.net/winhex/) (Windows上) 或用 hexdump 命令 (linux上) 查看到这些字节： ``` 0x89, 0x50, 0x4E, 0x47, 0x0D, 0x0A, ...... , 0xAE, 0x42, 0x60, 0x82 ``` -该png码流解码后会产生原始像素，这是个小图像，只有4列2行，共8个像素，这些像素的十六进制表示如下表。其中R, G, B, A分别代表像素的红、绿、蓝、透明通道。 +该png码流解码后会产生原始像素，该图像只有4列2行，共8个像素，这些像素的十六进制表示如下表。其中R, G, B, A分别代表像素的红、绿、蓝、透明通道。 | | 列 1 | 列 2 | 列 3 | 列 4 | | :---: | :---: | :---: | :---: | :---: | | 行 1 | R:FF G:F2 B:00 A:FF | R:ED G:1C B:24 A:FF | R:00 G:00 B:00 A:FF | R:3F G:48 B:CC A:FF | | 行 2 | R:7F G:7F B:7F A:FF | R:ED G:1C B:24 A:FF | R:FF G:FF B:FF A:FF | R:FF G:AE B:CC A:FF | - +　 # 使用 Hard-PNG -RTL 目录中的 hard_png.sv 是一个能够输入 png 码流，输出解压后的像素的模块，它的接口如**图2**所示。 +RTL 目录中的 hard_png.v 是一个能够输入 png 码流，输出解压后的像素的模块，它的接口如**图2**所示。 | ![接口图](./figures/interface.png) | | :----: | @@ -71,14 +231,14 @@ hard_png 的使用方法很简单，以 SIM/test_image/img01.png 这张图像为 | :----: | | **图4** : hard_png 的输出波形图 | - +　 # 仿真 仿真相关的东西都在 SIM 文件夹中，其中： - test_image 中提供 14 张不同尺寸，不同颜色类型的 png 图像文件。 -- tb_hard_png.sv 是仿真代码，它会依次进行这些图像的压缩，然后把结果（原始像素）写入 txt 文件中。 +- tb_hard_png.v 是仿真代码，它会依次进行这些图像的压缩，然后把结果（原始像素）写入 txt 文件中。 - tb_hard_png_run_iverilog.bat 包含了运行 iverilog 仿真的命令。 - validation.py （Python代码）对仿真输出和软件 png 解码的结果进行比对，验证正确性。 @@ -116,30 +276,30 @@ size2= (400, 4) total 400 pixels validation successful!! ``` - +　 # 部署信息 ## FPGA 资源消耗 -| FPGA 型号 | LUT | LUT(%) | FF | FF(%) | Logic | Logic(%) | BRAM | BRAM(%) | -| :----------------------------: | :--: | :----: | :--: | :---: | :---: | :------: | :-----: | :-----: | -| Xilinx Artix-7 XC7A35T | 2581 | 13% | 2253 | 5% | - | - | 792kbit | 44% | -| Altera Cyclone IV EP4CE40F23C6 | - | - | - | - | 4682 | 11% | 427kbit | 37% | +| FPGA 型号 | Logic | Logic (%) | BRAM | BRAM (%) | 最高频率 (刚好时序收敛) | +| :----------------------------: | :------: | :-------: | :--------: | :------: | :---------------------: | +| Xilinx Artix-7 XC7A35T | 2662×LUT | 13% | 22×BRAM36K | 44% | 66.6 MHz | +| Altera Cyclone IV EP4CE40F23C6 | 5277×LE | 13% | 427kbit | 37% | 56 MHz | ## 性能 -在 Altera Cyclone IV EP4CE40F23C6 上部署 hard_png ，时钟频率= 50MHz （正好时序收敛）。根据仿真时每个图像消耗的时钟周期数，可以算出压缩图像时的性能，举例如下表。 +当运行在 50MHz 时，根据仿真时每个图像消耗的时钟周期数，可以算出压缩图像时的性能。例如，对于部分我提供的测试文件，性能举例如下表。 | 文件名 | 颜色类型 | 图象长宽 | 像素数 | png 码流大小 (字节) | 时钟周期数 | 消耗时间 | -| :-----------: | :----------: | :----------: | :--------------: | :---------------: | :---------------: | ------------- | +| :-----------: | :----------: | :----------: | :--------------: | :---------------: | :---------------: | :-----------: | | img05.png | RGB | 300x256 | 76800 | 96536 | 1105702 | 23ms | | img06.png | 灰度 | 300x263 | 78900 | 37283 | 395335 | 8ms | | img09.png | RGBA | 300x263 | 78900 | 125218 | 1382303 | 28ms | | img10.png | 索引RGB | 631x742 | 468202 | 193489 | 2374224 | 48ms | | img14.png | 索引RGB | 1920x1080 | 2073600 | 818885 | 10177644 | 204ms | - +　 # 参考链接 @@ -150,150 +310,3 @@ total 400 pixels validation successful!! - - -Hard-PNG -=========================== - -FPGA-based streaming **png** image decoder, input png stream, output original pixels. - -* Support image width less than 4000, height unlimited. -* **Supports all color types** : Grayscale, Grayscale+A, RGB, Indexed RGB, and RGB+A. -* Only 8bit depth is supported (actually most png images are 8bit depth). - -| ![diagram](./figures/diagram.png) | -| :---------------------------------------: | -| **Figure1** : Hard-PNG schematic diagram. | - - - -# Background - -**png** is the second most common compressed image format after **jpg** . png supports transparency channel (A channel), lossless compression, and indexed RGB (palette-based lossy compression). In colorful digital photos, png can only get 1 to 4 times the lossless compression ratio. In synthetic images (such as graphic design), png can achieve more than 10 times the lossless compression ratio. - -png image files have the **.png** suffix name. Take [SIM/test_image/img01.png](./SIM/test_image) in this repository as an example, it contains 98 bytes, which are called png stream. We can use [WinHex software](http://www.x-ways.net/winhex/) to view these bytes: - -``` -0x89, 0x50, 0x4E, 0x47, 0x0D, 0x0A, ...... , 0xAE, 0x42, 0x60, 0x82 -``` - -After the png stream is decompressed, the original pixels will be generated. This is a small image with only 4 columns and 2 rows, and a total of 8 pixels. The hexadecimal representation of these pixels is as follows. where R, G, B, A represent the red, green, blue and transparent channels of the pixel, respectively. - -| | 列 1 | 列 2 | 列 3 | 列 4 | -| :--: | :-----------------: | :-----------------: | :-----------------: | :-----------------: | -| 行 1 | R:FF G:F2 B:00 A:FF | R:ED G:1C B:24 A:FF | R:00 G:00 B:00 A:FF | R:3F G:48 B:CC A:FF | -| 行 2 | R:7F G:7F B:7F A:FF | R:ED G:1C B:24 A:FF | R:FF G:FF B:FF A:FF | R:FF G:AE B:CC A:FF | - - - -# Hard-PNG Usage - -[hard_png.sv](./RTL) in [RTL](./RTL) directory is a module that can input png stream and output decompressed original pixels. Its interface is shown in **Figure2**. - -| ![接口图](./figures/interface.png) | -| :----------------------------------: | -| **Figure2** : interface of hard_png. | - -## Input png stream - -It's easy to use hard_png module. Take the image [SIM/test_image/img01.png](./SIM/test_image) as an example again, such as **Figure3**, before inputting the png stream, a high level pulse must be generated on `istart` (with a width of at least one clock cycle), and then input the png stream through `ivalid` and `ibyte` signals (the png stream of this image has 98 bytes, these 98 bytes must be input to hard_png one by one), among which `ivalid` and `iready` constitutes handshake signals: `ivalid=1` indicates that the user wants to send a byte to hard_png. `iready=1` indicates that hard_png is ready to accept a byte. Only when `ivalid` and `iready` both = 1 at the same time, the handshake is successful, and `ibyte` is successfully input into hard_png. - -| ![输入时序图](./figures/wave1.png) | -| :---------------------------------------: | -| **Figure3** : input waveform of hard_png. | - -When it finish to input one png image, the next png image can be input immediately or later (that is, pulse the `istart` again, and then input the next png stream). - -## Output image information and pixels - -At the same time of inputting the png stream, the decompression result of this image (including the basic information of this image and the original pixels) will be output from the module, as shown in **Figure4**, first of all, `ostart` signal will appear A high-level pulse for one cycle, and `colortype`, `width`, and `height` will be valid simutinously, where: - -- `width`, `height` are the width and height of the image. -- `colortype` is the color type of the png image, with the meaning in the table below. - -| colortype | 3'd0 | 3'd1 | 3'd2 | 3'd3 | 3‘d4 | -| :-------: | :-----------: | :---------: | :-----------: | :-----: | :-----------: | -| meaning | grayscale | grayscale+A | RGB | RGB+A | indexed RGB | -| remark | R=G=B，A=0xFF | R=G=B≠A | R≠G≠B，A=0xFF | R≠G≠B≠A | R≠G≠B，A=0xFF | - -Then, `ovalid=1` means that there is a pixel output in this cycle, meanwhile, the R, G, B, A channels of this pixel will appear on `opixelr`, `opixelg`, `opixelb`, and `opixela` signals respectively. - -| ![输出时序图](./figures/wave2.png) | -| :----------------------------------------: | -| **Figure4** : output waveform of hard_png. | - - - -# RTL Simulation - -Simulation related files are in the [SIM](./SIM) folder, where: - -- 14 png image files of different sizes and different color types are provided in [test_image](./SIM/test_image) folder. -- tb_hard_png.sv is the testbench code that compresses these images in sequence and writes the result (raw pixels) to txt files. -- tb_hard_png_run_iverilog.bat is the command script to run iverilog simulation. -- validation.py (Python code) compares the simulation output with the result of the software png decoding to verify the correctness. - -Before using iverilog for simulation, you need to install iverilog , see: [iverilog_usage](https://github.com/WangXuan95/WangXuan95/blob/main/iverilog_usage/iverilog_usage.md) - -Then double-click tb_hard_png_run_iverilog.bat to run the simulation, which will run for about 30 minutes (it can be forced to close halfway, but the generated simulation waveform is incomplete). - -After the simulation runs, you can open the generated dump.vcd file to view the waveform. - -In addition, each png image will generate a corresponding .txt file, which contains the decoding result. For example, img01.png generates out01.txt, which contains the decoded 8 pixel values: - -``` -decode result: colortype:3 width:4 height:2 -fff200ff ed1c24ff 000000ff 3f48ccff 7f7f7fff ed1c24ff ffffffff ffaec9ff -``` - -## Correctness verification - -In order to verify that the decompression results are correct, I provide a Python program [validation.py](./SIM), which can decompress the .png file and compares it with each pixel in the .txt file generated by the simulation. If the comparison results are the same, the validation passed. - -In order to run validation.py , you need to install Python3 and its [numpy](https://pypi.org/project/numpy/) and [PIL](https://pypi.org/project/Pillow/) libraries. - -Then, run validation.py by this command: - -``` -python validation.py test_image/img03.png out03.txt -``` - -The meaning of this command is: Compare each pixel in [out03.txt]() to see if it matches [test_image/img03.png](). The print is as follows (indicating that the verification passed): - -``` -size1= (400, 4) -size2= (400, 4) -total 400 pixels validation successful!! -``` - - - -# FPGA Deployment - -## FPGA resource usage - -| FPGA part | LUT | LUT(%) | FF | FF(%) | Logic | Logic(%) | BRAM | BRAM(%) | -| :----------------------------: | :--: | :----: | :--: | :---: | :---: | :------: | :-----: | :-----: | -| Xilinx Artix-7 XC7A35T | 2581 | 13% | 2253 | 5% | - | - | 792kbit | 44% | -| Altera Cyclone IV EP4CE40F23C6 | - | - | - | - | 4682 | 11% | 427kbit | 37% | - -## Performance - -I deploy hard_png on Altera Cyclone IV EP4CE40F23C6 and get clock frequency = 50MHz (just reach timing closure). According to the number of clock cycles consumed by each image during simulation, we can calculate the performance as shown in the following table. - -| png file | color type | image size | pixel count | png stream size | cycle count | time | -| :-------: | :---------: | :--------: | :---------: | :-------------: | :---------: | ----- | -| img05.png | RGB | 300x256 | 76800 | 96536 | 1105702 | 23ms | -| img06.png | Grayscale | 300x263 | 78900 | 37283 | 395335 | 8ms | -| img09.png | RGBA | 300x263 | 78900 | 125218 | 1382303 | 28ms | -| img10.png | Indexed RGB | 631x742 | 468202 | 193489 | 2374224 | 48ms | -| img14.png | Indexed RGB | 1920x1080 | 2073600 | 818885 | 10177644 | 204ms | - - - - -# Reference - -* [upng](https://github.com/elanthis/upng): A lightweight C language png decoding library. -* [TinyPNG](https://tinypng.com/): A lossy compression tool using png's indexed RGB. -* [PNG Specification](https://www.w3.org/TR/REC-png.pdf). diff --git a/RTL/hard_png.sv b/RTL/hard_png.v similarity index 84% rename from RTL/hard_png.sv rename to RTL/hard_png.v index 9fe6bcb..da1156f 100644 --- a/RTL/hard_png.sv +++ b/RTL/hard_png.v @@ -2,7 +2,7 @@ //-------------------------------------------------------------------------------------------------------- // Module : hard_png // Type : synthesizable, IP's top -// Standard: SystemVerilog 2005 (IEEE1800-2005) +// Standard: Verilog 2001 (IEEE1364-2001) // Function: png image decoder //-------------------------------------------------------------------------------------------------------- @@ -24,15 +24,17 @@ module hard_png ( output wire [ 7:0] opixelr, opixelg, opixelb, opixela ); + + initial ostart = 1'b0; initial ovalid = 1'b0; -reg isplte = '0; +reg isplte = 1'b0; -reg [ 1:0] bpp = '0; // bytes per pixel -reg [13:0] ppr = '0; // pixel per row -reg [13:0] bpr = '0; // bytes per row -reg [31:0] rpf = '0; // rows per frame +reg [ 1:0] bpp = 0; // bytes per pixel +reg [13:0] ppr = 0; // pixel per row +reg [13:0] bpr = 0; // bytes per row +reg [31:0] rpf = 0; // rows per frame assign colortype = isplte ? 3'd4 : {1'b0,bpp}; @@ -43,15 +45,15 @@ reg pvalid; reg pready; reg [ 7:0] pbyte; -reg mvalid = '0; -reg [ 7:0] mbyte = '0; +reg mvalid = 0; +reg [ 7:0] mbyte = 0; -reg bvalid = '0; -reg [ 7:0] bbyte = '0; +reg bvalid = 0; +reg [ 7:0] bbyte = 0; -reg plte_wen = '0; -reg [ 7:0] plte_waddr = '0; -reg [23:0] plte_wdata = '0; +reg plte_wen = 0; +reg [ 7:0] plte_waddr = 0; +reg [23:0] plte_wdata = 0; reg [23:0] plte_rdata; @@ -61,8 +63,8 @@ reg [23:0] plte_rdata; // png parser //----------------------------------------------------------------------------------------------------------------------- -wire ispltes [8]; assign ispltes[0]=1'b0; assign ispltes[1]=1'b0; assign ispltes[2]=1'b0; assign ispltes[3]=1'b1; assign ispltes[4]=1'b0; assign ispltes[5]=1'b0; assign ispltes[6]=1'b0; assign ispltes[7]=1'b0; -wire [ 1:0] bpps [8]; assign bpps[0]=2'd0; assign bpps[1]=2'd0; assign bpps[2]=2'd2; assign bpps[3]=2'd0; assign bpps[4]=2'd1; assign bpps[5]=2'd0; assign bpps[6]=2'd3; assign bpps[7]=2'd0; +wire ispltes [0:7]; assign ispltes[0]=1'b0; assign ispltes[1]=1'b0; assign ispltes[2]=1'b0; assign ispltes[3]=1'b1; assign ispltes[4]=1'b0; assign ispltes[5]=1'b0; assign ispltes[6]=1'b0; assign ispltes[7]=1'b0; +wire [ 1:0] bpps [0:7]; assign bpps[0]=2'd0; assign bpps[1]=2'd0; assign bpps[2]=2'd2; assign bpps[3]=2'd0; assign bpps[4]=2'd1; assign bpps[5]=2'd0; assign bpps[6]=2'd3; assign bpps[7]=2'd0; wire [63:0] png_precode = 64'h89504e470d0a1a0a; wire [31:0] ihdr_name = 32'h49484452; @@ -70,25 +72,25 @@ wire [31:0] plte_name = 32'h504C5445; wire [31:0] idat_name = 32'h49444154; wire [31:0] iend_name = 32'h49454e44; -reg [ 7:0] latchbytes [7]; -wire [ 7:0] lastbytes [8]; +reg [ 7:0] latchbytes [0:6]; +wire [ 7:0] lastbytes [0:7]; wire [63:0] lastlbytes; wire [31:0] h32bit = lastlbytes[63:32]; wire [31:0] l32bit = lastlbytes[31: 0]; assign lastbytes[7] = ibyte; -initial {latchbytes[0],latchbytes[1],latchbytes[2],latchbytes[3],latchbytes[4],latchbytes[5],latchbytes[6]} = '0; +initial {latchbytes[0],latchbytes[1],latchbytes[2],latchbytes[3],latchbytes[4],latchbytes[5],latchbytes[6]} = 0; generate genvar ii; for(ii=0; ii<7; ii=ii+1) begin : generate_latchbytes_connect assign lastbytes[ii] = latchbytes[ii]; always @ (posedge clk or negedge rstn) if(~rstn) - latchbytes[ii] <= '0; + latchbytes[ii] <= 0; else begin if(istart) - latchbytes[ii] <= '0; + latchbytes[ii] <= 0; else if(ivalid) latchbytes[ii] <= lastbytes[ii+1]; end @@ -104,23 +106,29 @@ assign lastlbytes[47:40] = lastbytes[2]; assign lastlbytes[55:48] = lastbytes[1]; assign lastlbytes[63:56] = lastbytes[0]; -reg [ 2:0] bcnt= '0; -reg [31:0] cnt = '0; -reg [ 2:0] crccnt = '0; -reg [ 2:0] gapcnt = '0; +reg [ 2:0] bcnt= 0; +reg [31:0] cnt = 0; +reg [ 2:0] crccnt = 0; +reg [ 2:0] gapcnt = 0; + +localparam [2:0] NONE = 3'd0, + IHDR = 3'd1, + PLTE = 3'd2, + IDAT = 3'd3, + IEND = 3'd4; +reg [2:0] curr_name = NONE; -enum {NONE, IHDR, PLTE, IDAT, IEND} curr_name = NONE; reg busy = 1'b0; reg sizevalid = 1'b0; reg ispltetmp = 1'b0; -reg [ 1:0] bpptmp = '0; // bytes per pixel -reg [13:0] pprtmp = '0; // pixel per row -reg [15:0] bprtmp = '0; // bytes per row -reg [31:0] rpftmp = '0; // rows per frame +reg [ 1:0] bpptmp = 0; // bytes per pixel +reg [13:0] pprtmp = 0; // pixel per row +reg [15:0] bprtmp = 0; // bytes per row +reg [31:0] rpftmp = 0; // rows per frame -reg [ 1:0] plte_bytecnt = '0; -reg [ 7:0] plte_pixcnt = '0; +reg [ 1:0] plte_bytecnt = 0; +reg [ 7:0] plte_pixcnt = 0; wire parametervalid = ( lastbytes[7]==8'h0 && lastbytes[6]==8'h0 && @@ -134,7 +142,7 @@ wire parametervalid = ( lastbytes[7]==8'h0 && ) ); -always_comb +always @ (*) if(cnt>0 && curr_name==IDAT && gapcnt==2'd0) begin iready = pready; pvalid = ivalid; @@ -142,81 +150,81 @@ always_comb end else begin iready = 1'b1; pvalid = 1'b0; - pbyte = '0; + pbyte = 0; end always @ (posedge clk or negedge rstn) if(~rstn) begin - bcnt <= '0; - cnt <= '0; - crccnt <= '0; - gapcnt <= '0; + bcnt <= 0; + cnt <= 0; + crccnt <= 0; + gapcnt <= 0; busy <= 1'b0; sizevalid <= 1'b0; curr_name <= NONE; ispltetmp <= 1'b0; - bpptmp <= '0; - pprtmp <= '0; - bprtmp <= '0; - rpftmp <= '0; + bpptmp <= 0; + pprtmp <= 0; + bprtmp <= 0; + rpftmp <= 0; isplte <= 1'b0; - bpp <= '0; - ppr <= '0; - bpr <= '0; - rpf <= '0; + bpp <= 0; + ppr <= 0; + bpr <= 0; + rpf <= 0; ostart <= 1'b0; plte_wen <= 1'b0; - plte_waddr <= '0; - plte_wdata <= '0; - plte_bytecnt <= '0; - plte_pixcnt <= '0; + plte_waddr <= 0; + plte_wdata <= 0; + plte_bytecnt <= 0; + plte_pixcnt <= 0; end else begin ostart <= 1'b0; plte_wen <= 1'b0; - plte_waddr <= '0; - plte_wdata <= '0; + plte_waddr <= 0; + plte_wdata <= 0; if(istart) begin - bcnt <= '0; - cnt <= '0; - crccnt <= '0; - gapcnt <= '0; + bcnt <= 0; + cnt <= 0; + crccnt <= 0; + gapcnt <= 0; busy <= 1'b0; sizevalid <= 1'b0; curr_name <= NONE; ispltetmp <= 1'b0; - bpptmp <= '0; - pprtmp <= '0; - bprtmp <= '0; - rpftmp <= '0; + bpptmp <= 0; + pprtmp <= 0; + bprtmp <= 0; + rpftmp <= 0; isplte <= 1'b0; - bpp <= '0; - ppr <= '0; - bpr <= '0; - rpf <= '0; - plte_bytecnt <= '0; - plte_pixcnt <= '0; + bpp <= 0; + ppr <= 0; + bpr <= 0; + rpf <= 0; + plte_bytecnt <= 0; + plte_pixcnt <= 0; end else if(ivalid) begin - plte_bytecnt <= '0; - plte_pixcnt <= '0; + plte_bytecnt <= 0; + plte_pixcnt <= 0; if(~busy) begin - bcnt <= '0; - cnt <= '0; - crccnt <= '0; + bcnt <= 0; + cnt <= 0; + crccnt <= 0; busy <= (lastlbytes==png_precode); end else begin if(cnt>0) begin - bcnt <= '0; + bcnt <= 0; if(curr_name==IHDR) begin cnt <= cnt - 1; gapcnt <= 2'd2; if(cnt==6) begin rpftmp <= l32bit; - if(h32bit[31:14]=='0) begin + if(h32bit[31:14] == 18'h0) begin sizevalid <= 1'b1; pprtmp <= h32bit[13:0]; end else begin sizevalid <= 1'b0; - pprtmp <= '1; + pprtmp <= 14'h3fff; end end else if(cnt==3) begin ispltetmp <= ispltes[lastlbytes[10:8]]; @@ -238,10 +246,10 @@ always @ (posedge clk or negedge rstn) rpf <= rpftmp; end else begin isplte <= 1'b0; - bpp <= '0; - ppr <= '0; - bpr <= '0; - rpf <= '0; + bpp <= 0; + ppr <= 0; + bpr <= 0; + rpf <= 0; end end end else if(curr_name==IDAT) begin @@ -271,8 +279,8 @@ always @ (posedge clk or negedge rstn) cnt <= cnt - 1; end end else if(crccnt>3'd0) begin - bcnt <= '0; - cnt <= '0; + bcnt <= 0; + cnt <= 0; crccnt <= crccnt - 3'd1; if(crccnt==3'd1) begin if(curr_name==IEND) begin @@ -308,13 +316,13 @@ always @ (posedge clk or negedge rstn) // uz_inflate //----------------------------------------------------------------------------------------------------------------------- -reg end_stream = '0; +reg end_stream = 0; wire huffman_ovalid; wire [7:0] huffman_obyte; -reg [ 2:0] uz_cnt = '0; -reg [ 7:0] rbyte = '0; +reg [ 2:0] uz_cnt = 0; +reg [ 7:0] rbyte = 0; reg tvalid; wire tready; @@ -323,18 +331,18 @@ reg tbit; always @ (posedge clk or negedge rstn) if(~rstn) begin mvalid <= 1'b0; - mbyte <= '0; + mbyte <= 0; end else begin if(istart) begin mvalid <= 1'b0; - mbyte <= '0; + mbyte <= 0; end else begin mvalid <= huffman_ovalid; mbyte <= huffman_obyte; end end -always_comb +always @ (*) if(uz_cnt==3'h0) begin pready = tready; tvalid = pvalid; @@ -347,12 +355,12 @@ always_comb always @ (posedge clk or negedge rstn) if(~rstn) begin - uz_cnt <= '0; - rbyte <= '0; + uz_cnt <= 0; + rbyte <= 0; end else begin if(istart) begin - uz_cnt <= '0; - rbyte <= '0; + uz_cnt <= 0; + rbyte <= 0; end else begin if(uz_cnt==3'h0) begin if(pvalid & tready) begin @@ -370,34 +378,34 @@ always @ (posedge clk or negedge rstn) //-------------------------------------------------------------------------------------------------------------------- // huffman inflate //-------------------------------------------------------------------------------------------------------------------- -wire [ 4:0] CLCL [19]; assign CLCL[0]=5'd16; assign CLCL[1]=5'd17; assign CLCL[2]=5'd18; assign CLCL[3]=5'd0; assign CLCL[4]=5'd8; assign CLCL[5]=5'd7; assign CLCL[6]=5'd9; assign CLCL[7]=5'd6; assign CLCL[8]=5'd10; assign CLCL[9]=5'd5; assign CLCL[10]=5'd11; assign CLCL[11]=5'd4; assign CLCL[12]=5'd12; assign CLCL[13]=5'd3; assign CLCL[14]=5'd13; assign CLCL[15]=5'd2; assign CLCL[16]=5'd14; assign CLCL[17]=5'd1; assign CLCL[18]=5'd15; -wire [ 8:0] LENGTH_BASE [30]; assign LENGTH_BASE[0]=9'd0; assign LENGTH_BASE[1]=9'd3; assign LENGTH_BASE[2]=9'd4; assign LENGTH_BASE[3]=9'd5; assign LENGTH_BASE[4]=9'd6; assign LENGTH_BASE[5]=9'd7; assign LENGTH_BASE[6]=9'd8; assign LENGTH_BASE[7]=9'd9; assign LENGTH_BASE[8]=9'd10; assign LENGTH_BASE[9]=9'd11; assign LENGTH_BASE[10]=9'd13; assign LENGTH_BASE[11]=9'd15; assign LENGTH_BASE[12]=9'd17; assign LENGTH_BASE[13]=9'd19; assign LENGTH_BASE[14]=9'd23; assign LENGTH_BASE[15]=9'd27; assign LENGTH_BASE[16]=9'd31; assign LENGTH_BASE[17]=9'd35; assign LENGTH_BASE[18]=9'd43; assign LENGTH_BASE[19]=9'd51; assign LENGTH_BASE[20]=9'd59; assign LENGTH_BASE[21]=9'd67; assign LENGTH_BASE[22]=9'd83; assign LENGTH_BASE[23]=9'd99; assign LENGTH_BASE[24]=9'd115; assign LENGTH_BASE[25]=9'd131; assign LENGTH_BASE[26]=9'd163; assign LENGTH_BASE[27]=9'd195; assign LENGTH_BASE[28]=9'd227; assign LENGTH_BASE[29]=9'd258; -wire [ 2:0] LENGTH_EXTRA [30]; assign LENGTH_EXTRA[0]=3'd0; assign LENGTH_EXTRA[1]=3'd0; assign LENGTH_EXTRA[2]=3'd0; assign LENGTH_EXTRA[3]=3'd0; assign LENGTH_EXTRA[4]=3'd0; assign LENGTH_EXTRA[5]=3'd0; assign LENGTH_EXTRA[6]=3'd0; assign LENGTH_EXTRA[7]=3'd0; assign LENGTH_EXTRA[8]=3'd0; assign LENGTH_EXTRA[9]=3'd1; assign LENGTH_EXTRA[10]=3'd1; assign LENGTH_EXTRA[11]=3'd1; assign LENGTH_EXTRA[12]=3'd1; assign LENGTH_EXTRA[13]=3'd2; assign LENGTH_EXTRA[14]=3'd2; assign LENGTH_EXTRA[15]=3'd2; assign LENGTH_EXTRA[16]=3'd2; assign LENGTH_EXTRA[17]=3'd3; assign LENGTH_EXTRA[18]=3'd3; assign LENGTH_EXTRA[19]=3'd3; assign LENGTH_EXTRA[20]=3'd3; assign LENGTH_EXTRA[21]=3'd4; assign LENGTH_EXTRA[22]=3'd4; assign LENGTH_EXTRA[23]=3'd4; assign LENGTH_EXTRA[24]=3'd4; assign LENGTH_EXTRA[25]=3'd5; assign LENGTH_EXTRA[26]=3'd5; assign LENGTH_EXTRA[27]=3'd5; assign LENGTH_EXTRA[28]=3'd5; assign LENGTH_EXTRA[29]=3'd0; -wire [14:0] DISTANCE_BASE [30]; assign DISTANCE_BASE[0]=15'd1; assign DISTANCE_BASE[1]=15'd2; assign DISTANCE_BASE[2]=15'd3; assign DISTANCE_BASE[3]=15'd4; assign DISTANCE_BASE[4]=15'd5; assign DISTANCE_BASE[5]=15'd7; assign DISTANCE_BASE[6]=15'd9; assign DISTANCE_BASE[7]=15'd13; assign DISTANCE_BASE[8]=15'd17; assign DISTANCE_BASE[9]=15'd25; assign DISTANCE_BASE[10]=15'd33; assign DISTANCE_BASE[11]=15'd49; assign DISTANCE_BASE[12]=15'd65; assign DISTANCE_BASE[13]=15'd97; assign DISTANCE_BASE[14]=15'd129; assign DISTANCE_BASE[15]=15'd193; assign DISTANCE_BASE[16]=15'd257; assign DISTANCE_BASE[17]=15'd385; assign DISTANCE_BASE[18]=15'd513; assign DISTANCE_BASE[19]=15'd769; assign DISTANCE_BASE[20]=15'd1025; assign DISTANCE_BASE[21]=15'd1537; assign DISTANCE_BASE[22]=15'd2049; assign DISTANCE_BASE[23]=15'd3073; assign DISTANCE_BASE[24]=15'd4097; assign DISTANCE_BASE[25]=15'd6145; assign DISTANCE_BASE[26]=15'd8193; assign DISTANCE_BASE[27]=15'd12289; assign DISTANCE_BASE[28]=15'd16385; assign DISTANCE_BASE[29]=15'd24577; -wire [ 3:0] DISTANCE_EXTRA [30]; assign DISTANCE_EXTRA[0]=4'd0; assign DISTANCE_EXTRA[1]=4'd0; assign DISTANCE_EXTRA[2]=4'd0; assign DISTANCE_EXTRA[3]=4'd0; assign DISTANCE_EXTRA[4]=4'd1; assign DISTANCE_EXTRA[5]=4'd1; assign DISTANCE_EXTRA[6]=4'd2; assign DISTANCE_EXTRA[7]=4'd2; assign DISTANCE_EXTRA[8]=4'd3; assign DISTANCE_EXTRA[9]=4'd3; assign DISTANCE_EXTRA[10]=4'd4; assign DISTANCE_EXTRA[11]=4'd4; assign DISTANCE_EXTRA[12]=4'd5; assign DISTANCE_EXTRA[13]=4'd5; assign DISTANCE_EXTRA[14]=4'd6; assign DISTANCE_EXTRA[15]=4'd6; assign DISTANCE_EXTRA[16]=4'd7; assign DISTANCE_EXTRA[17]=4'd7; assign DISTANCE_EXTRA[18]=4'd8; assign DISTANCE_EXTRA[19]=4'd8; assign DISTANCE_EXTRA[20]=4'd9; assign DISTANCE_EXTRA[21]=4'd9; assign DISTANCE_EXTRA[22]=4'd10; assign DISTANCE_EXTRA[23]=4'd10; assign DISTANCE_EXTRA[24]=4'd11; assign DISTANCE_EXTRA[25]=4'd11; assign DISTANCE_EXTRA[26]=4'd12; assign DISTANCE_EXTRA[27]=4'd12; assign DISTANCE_EXTRA[28]=4'd13; assign DISTANCE_EXTRA[29]=4'd13; +wire [ 4:0] CLCL [0:18]; assign CLCL[0]=5'd16; assign CLCL[1]=5'd17; assign CLCL[2]=5'd18; assign CLCL[3]=5'd0; assign CLCL[4]=5'd8; assign CLCL[5]=5'd7; assign CLCL[6]=5'd9; assign CLCL[7]=5'd6; assign CLCL[8]=5'd10; assign CLCL[9]=5'd5; assign CLCL[10]=5'd11; assign CLCL[11]=5'd4; assign CLCL[12]=5'd12; assign CLCL[13]=5'd3; assign CLCL[14]=5'd13; assign CLCL[15]=5'd2; assign CLCL[16]=5'd14; assign CLCL[17]=5'd1; assign CLCL[18]=5'd15; +wire [ 8:0] LENGTH_BASE [0:29]; assign LENGTH_BASE[0]=9'd0; assign LENGTH_BASE[1]=9'd3; assign LENGTH_BASE[2]=9'd4; assign LENGTH_BASE[3]=9'd5; assign LENGTH_BASE[4]=9'd6; assign LENGTH_BASE[5]=9'd7; assign LENGTH_BASE[6]=9'd8; assign LENGTH_BASE[7]=9'd9; assign LENGTH_BASE[8]=9'd10; assign LENGTH_BASE[9]=9'd11; assign LENGTH_BASE[10]=9'd13; assign LENGTH_BASE[11]=9'd15; assign LENGTH_BASE[12]=9'd17; assign LENGTH_BASE[13]=9'd19; assign LENGTH_BASE[14]=9'd23; assign LENGTH_BASE[15]=9'd27; assign LENGTH_BASE[16]=9'd31; assign LENGTH_BASE[17]=9'd35; assign LENGTH_BASE[18]=9'd43; assign LENGTH_BASE[19]=9'd51; assign LENGTH_BASE[20]=9'd59; assign LENGTH_BASE[21]=9'd67; assign LENGTH_BASE[22]=9'd83; assign LENGTH_BASE[23]=9'd99; assign LENGTH_BASE[24]=9'd115; assign LENGTH_BASE[25]=9'd131; assign LENGTH_BASE[26]=9'd163; assign LENGTH_BASE[27]=9'd195; assign LENGTH_BASE[28]=9'd227; assign LENGTH_BASE[29]=9'd258; +wire [ 2:0] LENGTH_EXTRA [0:29]; assign LENGTH_EXTRA[0]=3'd0; assign LENGTH_EXTRA[1]=3'd0; assign LENGTH_EXTRA[2]=3'd0; assign LENGTH_EXTRA[3]=3'd0; assign LENGTH_EXTRA[4]=3'd0; assign LENGTH_EXTRA[5]=3'd0; assign LENGTH_EXTRA[6]=3'd0; assign LENGTH_EXTRA[7]=3'd0; assign LENGTH_EXTRA[8]=3'd0; assign LENGTH_EXTRA[9]=3'd1; assign LENGTH_EXTRA[10]=3'd1; assign LENGTH_EXTRA[11]=3'd1; assign LENGTH_EXTRA[12]=3'd1; assign LENGTH_EXTRA[13]=3'd2; assign LENGTH_EXTRA[14]=3'd2; assign LENGTH_EXTRA[15]=3'd2; assign LENGTH_EXTRA[16]=3'd2; assign LENGTH_EXTRA[17]=3'd3; assign LENGTH_EXTRA[18]=3'd3; assign LENGTH_EXTRA[19]=3'd3; assign LENGTH_EXTRA[20]=3'd3; assign LENGTH_EXTRA[21]=3'd4; assign LENGTH_EXTRA[22]=3'd4; assign LENGTH_EXTRA[23]=3'd4; assign LENGTH_EXTRA[24]=3'd4; assign LENGTH_EXTRA[25]=3'd5; assign LENGTH_EXTRA[26]=3'd5; assign LENGTH_EXTRA[27]=3'd5; assign LENGTH_EXTRA[28]=3'd5; assign LENGTH_EXTRA[29]=3'd0; +wire [14:0] DISTANCE_BASE [0:29]; assign DISTANCE_BASE[0]=15'd1; assign DISTANCE_BASE[1]=15'd2; assign DISTANCE_BASE[2]=15'd3; assign DISTANCE_BASE[3]=15'd4; assign DISTANCE_BASE[4]=15'd5; assign DISTANCE_BASE[5]=15'd7; assign DISTANCE_BASE[6]=15'd9; assign DISTANCE_BASE[7]=15'd13; assign DISTANCE_BASE[8]=15'd17; assign DISTANCE_BASE[9]=15'd25; assign DISTANCE_BASE[10]=15'd33; assign DISTANCE_BASE[11]=15'd49; assign DISTANCE_BASE[12]=15'd65; assign DISTANCE_BASE[13]=15'd97; assign DISTANCE_BASE[14]=15'd129; assign DISTANCE_BASE[15]=15'd193; assign DISTANCE_BASE[16]=15'd257; assign DISTANCE_BASE[17]=15'd385; assign DISTANCE_BASE[18]=15'd513; assign DISTANCE_BASE[19]=15'd769; assign DISTANCE_BASE[20]=15'd1025; assign DISTANCE_BASE[21]=15'd1537; assign DISTANCE_BASE[22]=15'd2049; assign DISTANCE_BASE[23]=15'd3073; assign DISTANCE_BASE[24]=15'd4097; assign DISTANCE_BASE[25]=15'd6145; assign DISTANCE_BASE[26]=15'd8193; assign DISTANCE_BASE[27]=15'd12289; assign DISTANCE_BASE[28]=15'd16385; assign DISTANCE_BASE[29]=15'd24577; +wire [ 3:0] DISTANCE_EXTRA [0:29]; assign DISTANCE_EXTRA[0]=4'd0; assign DISTANCE_EXTRA[1]=4'd0; assign DISTANCE_EXTRA[2]=4'd0; assign DISTANCE_EXTRA[3]=4'd0; assign DISTANCE_EXTRA[4]=4'd1; assign DISTANCE_EXTRA[5]=4'd1; assign DISTANCE_EXTRA[6]=4'd2; assign DISTANCE_EXTRA[7]=4'd2; assign DISTANCE_EXTRA[8]=4'd3; assign DISTANCE_EXTRA[9]=4'd3; assign DISTANCE_EXTRA[10]=4'd4; assign DISTANCE_EXTRA[11]=4'd4; assign DISTANCE_EXTRA[12]=4'd5; assign DISTANCE_EXTRA[13]=4'd5; assign DISTANCE_EXTRA[14]=4'd6; assign DISTANCE_EXTRA[15]=4'd6; assign DISTANCE_EXTRA[16]=4'd7; assign DISTANCE_EXTRA[17]=4'd7; assign DISTANCE_EXTRA[18]=4'd8; assign DISTANCE_EXTRA[19]=4'd8; assign DISTANCE_EXTRA[20]=4'd9; assign DISTANCE_EXTRA[21]=4'd9; assign DISTANCE_EXTRA[22]=4'd10; assign DISTANCE_EXTRA[23]=4'd10; assign DISTANCE_EXTRA[24]=4'd11; assign DISTANCE_EXTRA[25]=4'd11; assign DISTANCE_EXTRA[26]=4'd12; assign DISTANCE_EXTRA[27]=4'd12; assign DISTANCE_EXTRA[28]=4'd13; assign DISTANCE_EXTRA[29]=4'd13; reg irepeat = 1'b0; reg srepeat = 1'b0; reg symbol_valid = 1'b0; -reg [7:0] symbol = '0; +reg [7:0] symbol = 0; -reg [ 1:0] iword = '0; -reg [ 1:0] ibcnt = '0; -reg [ 4:0] precode_wpt = '0; +reg [ 1:0] iword = 0; +reg [ 1:0] ibcnt = 0; +reg [ 4:0] precode_wpt = 0; /* */ reg bfin = 1'b0; reg bfix = 1'b0; reg fixed_tree = 1'b0; -reg [13:0] precode_reg = '0; +reg [13:0] precode_reg = 0; wire [ 4:0] hclen = 5'd4 + {1'b0, precode_reg[13:10]}; wire [ 8:0] hlit = 9'd257 + precode_reg[ 4: 0]; wire [ 8:0] hdist = 9'd1 + {4'h0, precode_reg[ 9: 5]}; wire [ 8:0] hmax = hlit + hdist; wire [ 8:0] hend = (hlit+9'd32>9'd288) ? hlit+9'd32 : 9'd288; -reg [ 4:0] lentree_wpt = '0; -reg [ 8:0] tree_wpt = '0; +reg [ 4:0] lentree_wpt = 0; +reg [ 8:0] tree_wpt = 0; wire lentree_codeen; wire [ 5:0] lentree_code; @@ -406,11 +414,17 @@ wire [ 9:0] codetree_code; wire distree_codeen; wire [ 9:0] distree_code; -reg [ 2:0] repeat_code_pt = '0; -enum {REPEAT_NONE, REPEAT_PREVIOUS, REPEAT_ZERO_FEW, REPEAT_ZERO_MANY} repeat_mode = REPEAT_NONE; -reg [ 6:0] repeat_code='0; -reg [ 7:0] repeat_len ='0; -reg [ 5:0] repeat_val = '0; +reg [ 2:0] repeat_code_pt = 0; + +localparam [1:0] REPEAT_NONE = 2'd0, + REPEAT_PREVIOUS = 2'd1, + REPEAT_ZERO_FEW = 2'd2, + REPEAT_ZERO_MANY = 2'd3; +reg [ 1:0] repeat_mode = REPEAT_NONE; + +reg [ 6:0] repeat_code=0; +reg [ 7:0] repeat_len =0; +reg [ 5:0] repeat_val = 0; reg lentree_run = 1'b0; wire lentree_done; @@ -422,7 +436,11 @@ wire tree_done = (codetree_done & distree_done) | fixed_tree; reg [ 2:0] tcnt =3'h0, tmax =3'h0; reg [ 3:0] dscnt=4'h0, dsmax=4'h0; -enum {T, D, R, S} huffman_status = T; +localparam [1:0] T = 2'd0, + D = 2'd1, + R = 2'd2, + S = 2'd3; +reg [1:0] huffman_status = T; wire lentree_ien = ~end_stream & tvalid & lentree_done & ~lentree_codeen & (repeat_mode==REPEAT_NONE && repeat_len==8'd0) & (tree_wpt3'd0) & (tree_wpt4'd0)) ) ); -reg [ 8:0] lengthb= '0; -reg [ 5:0] lengthe= '0; +reg [ 8:0] lengthb= 0; +reg [ 5:0] lengthe= 0; wire [ 8:0] length = lengthb + lengthe; -reg [ 8:0] len_last = '0; +reg [ 8:0] len_last = 0; -reg [15:0] distanceb='0; -reg [15:0] distancee='0; +reg [15:0] distanceb=0; +reg [15:0] distancee=0; wire [15:0] distance = distanceb + distancee; reg lentree_wen = 1'b0; -reg [ 4:0] lentree_waddr = '0; -reg [ 2:0] lentree_wdata = '0; +reg [ 4:0] lentree_waddr = 0; +reg [ 2:0] lentree_wdata = 0; reg codetree_wen = 1'b0; -reg [ 8:0] codetree_waddr = '0; -reg [ 5:0] codetree_wdata = '0; +reg [ 8:0] codetree_waddr = 0; +reg [ 5:0] codetree_wdata = 0; reg distree_wen = 1'b0; -reg [ 4:0] distree_waddr = '0; -reg [ 5:0] distree_wdata = '0; +reg [ 4:0] distree_waddr = 0; +reg [ 5:0] distree_wdata = 0; wire [ 5:0] lentree_raddr; wire [ 5:0] lentree_rdata; @@ -461,74 +479,94 @@ wire [ 5:0] distree_raddr; wire [ 9:0] distree_rdata; reg [ 9:0] distree_rdata_fixed; -task automatic lentree_write(input wen=1'b0, input [4:0] waddr='0, input [2:0] wdata='0); +task lentree_write; + input wen; + input [4:0] waddr; + input [2:0] wdata; +//task automatic lentree_write(input wen=1'b0, input [4:0] waddr='0, input [2:0] wdata='0); +begin lentree_wen <= wen; lentree_waddr <= waddr; lentree_wdata <= wdata; +end endtask -task automatic codetree_write(input wen=1'b0, input [8:0] waddr='0, input [5:0] wdata='0); +task codetree_write; + input wen; + input [8:0] waddr; + input [5:0] wdata; +//task automatic codetree_write(input wen=1'b0, input [8:0] waddr='0, input [5:0] wdata='0); +begin codetree_wen <= wen; codetree_waddr <= waddr; codetree_wdata <= wdata; +end endtask -task automatic distree_write(input wen=1'b0, input [4:0] waddr='0, input [5:0] wdata='0); +task distree_write; + input wen; + input [4:0] waddr; + input [5:0] wdata; +//task automatic distree_write(input wen=1'b0, input [4:0] waddr='0, input [5:0] wdata='0); +begin distree_wen <= wen; distree_waddr <= waddr; distree_wdata <= wdata; +end endtask -task automatic reset_all_regs; - {bfin, bfix, fixed_tree} <= '0; - iword <= '0; - ibcnt <= '0; - precode_wpt <= '0; - precode_reg <= '0; - lentree_wpt <= '0; +task reset_all_regs; +begin + {bfin, bfix, fixed_tree} <= 0; + iword <= 0; + ibcnt <= 0; + precode_wpt <= 0; + precode_reg <= 0; + lentree_wpt <= 0; lentree_run <= 1'b0; tree_run <= 1'b0; - lentree_write(); - codetree_write(); - distree_write(); - repeat_code_pt <= '0; + lentree_write(0,0,0); + codetree_write(0,0,0); + distree_write(0,0,0); + repeat_code_pt <= 0; repeat_mode <= REPEAT_NONE; - repeat_code <= '0; - repeat_len <= '0; - repeat_val <= '0; - tree_wpt <= '0; - tcnt <= '0; - tmax <= '0; - lengthb <= '0; - lengthe <= '0; - distanceb<= '0; - distancee<= '0; - dscnt <= '0; - dsmax <= '0; + repeat_code <= 0; + repeat_len <= 0; + repeat_val <= 0; + tree_wpt <= 0; + tcnt <= 0; + tmax <= 0; + lengthb <= 0; + lengthe <= 0; + distanceb<= 0; + distancee<= 0; + dscnt <= 0; + dsmax <= 0; huffman_status <= T; symbol_valid <= 1'b0; - symbol <= '0; + symbol <= 0; irepeat <= 1'b0; srepeat <= 1'b0; - len_last <= '0; + len_last <= 0; +end endtask always @ (posedge clk or negedge rstn) if(~rstn) begin - end_stream <= '0; + end_stream <= 0; reset_all_regs; end else begin if(istart) begin - end_stream <= '0; + end_stream <= 0; reset_all_regs; end else begin symbol_valid <= 1'b0; - symbol <= '0; + symbol <= 0; irepeat <= 1'b0; srepeat <= 1'b0; - lentree_write(); - codetree_write(); - distree_write(); + lentree_write(0,0,0); + codetree_write(0,0,0); + distree_write(0,0,0); if(precode_wpt<=2) begin lentree_run <= 1'b0; tree_run <= 1'b0; @@ -540,9 +578,9 @@ always @ (posedge clk or negedge rstn) bfix <= tbit; end else begin if( {tbit,bfix} == 2'b01 ) begin - precode_wpt <= '1; - lentree_wpt <= '1; - tree_wpt <= '1; + precode_wpt <= 5'h1F; + lentree_wpt <= 5'h1F; + tree_wpt <= 9'h1FF; fixed_tree <= 1'b1; end end @@ -570,7 +608,7 @@ always @ (posedge clk or negedge rstn) end else if(lentree_wpt<19) begin lentree_run <= 1'b0; tree_run <= 1'b0; - lentree_write(1'b1, CLCL[lentree_wpt], '0); + lentree_write(1'b1, CLCL[lentree_wpt], 0); lentree_wpt <= lentree_wpt + 5'd1; end else if(~ (lentree_done | fixed_tree)) begin lentree_run <= ~fixed_tree; @@ -603,9 +641,9 @@ always @ (posedge clk or negedge rstn) repeat_len <= repeat_len - 8'd1; tree_wpt <= tree_wpt + 9'd1; if(tree_wpt<288) - codetree_write(1'b1, tree_wpt, (tree_wpt=hlit && tree_wpt<(hlit+9'd32)) - distree_write(1'b1, tree_wpt - hlit, (tree_wpt=hlit && tree_wpt<(hlit+9'd32)) - distree_write(1'b1, tree_wpt - hlit, (tree_wpt=hlit && tree_wpt<(hlit+9'd32)) - distree_write(1'b1, tree_wpt - hlit, '0); + distree_write(1'b1, tree_wpt - hlit, 0); tree_wpt <= tree_wpt + 9'd1; end else if(tree_wpt sb ? p - sb : sb - p; pc = p > sc ? p - sc : sc - p; if (pa <= pb && pa <= pc) - return a; + paeth = a; else if (pb <= pc) - return b; + paeth = b; else - return c; + paeth = c; +end endfunction reg nfirstrow = 1'b0; -reg [13:0] col = '0; -reg [ 2:0] mode = '0; +reg [13:0] col = 0; +reg [ 2:0] mode = 0; reg [ 7:0] fdata; wire [ 7:0] LLdata, UUdata, ULdata; wire nfirstcol = col > (14'h1+bpp); @@ -937,32 +979,32 @@ wire [ 8:0] SSdata = (nfirstcol ? {1'b0,LLdata} : 9'h0) + (nfirstrow ? {1'b0,UUd always @ (posedge clk or negedge rstn) if(~rstn) begin nfirstrow <= 1'b0; - col <= '0; + col <= 0; end else begin if(istart) begin nfirstrow <= 1'b0; - col <= '0; + col <= 0; end else if(mvalid) begin if(col0; clogb2=clogb2+1) valtmp = valtmp>>1; + for (clogb2=0; valtmp>0; clogb2=clogb2+1) + valtmp = valtmp>>1; +end endfunction input rstn; @@ -46,46 +53,48 @@ wire done; wire [clogb2(2*NUMCODES-1)-1:0] rdaddr; reg [ OUTWIDTH-1:0] rddata; -reg [clogb2(NUMCODES)-1:0] blcount [BITLENGTH]; -reg [ (1<0; treepos <= ntreepos; @@ -97,131 +106,139 @@ always @ (posedge clk or negedge rstn) always @ (posedge clk or negedge rstn) if(~rstn) - blen <= '0; + blen <= 0; else begin if(istart) - blen <= '0; + blen <= 0; else if(islast) blen <= blenn; end always @ (posedge clk or negedge rstn) if(~rstn) begin - for(int i=0; i= (clogb2(2*NUMCODES-1))'(2*NUMCODES-1) ) + if ( clearidx >= (2*NUMCODES-1) ) clear_tree2d <= 1'b1; - clearidx <= clearidx + (clogb2(2*NUMCODES-1))'(1); + clearidx <= clearidx + 1; end else if(build_tree2d) begin if(nn < NUMCODES) begin if(islast) begin - ii <= blenn - (CODEBITS)'(1); + ii <= blenn - 1; if(blen>0) - nextcode[blen] <= tree1d + (1<0) - nodefilled <= nodefilled + (clogb2(2*NUMCODES-1))'(1); + nodefilled <= nodefilled + 1; end -reg [CODEBITS-1:0] mem_huffman_bitlens [NUMCODES]; +reg [CODEBITS-1:0] mem_huffman_bitlens [0 : NUMCODES-1]; always @ (posedge clk) if(wren) mem_huffman_bitlens[wraddr] <= wrdata; -wire [clogb2(NUMCODES-1)-1:0] mem_rdaddr = (clogb2(NUMCODES-1))'(nnn) + (clogb2(NUMCODES-1))'(1); +wire [clogb2(NUMCODES-1)-1:0] mem_rdaddr = nnn + 1; always @ (posedge clk) blenn <= mem_huffman_bitlens[mem_rdaddr]; -reg [OUTWIDTH:0] mem_tree2d [2*NUMCODES]; +reg [OUTWIDTH:0] mem_tree2d [0 : 2*NUMCODES-1]; always @ (posedge clk) if( ~clear_tree2d | (valid & rdfilled) ) - mem_tree2d[ (clogb2(2*NUMCODES-1))'(~clear_tree2d ? clearidx : tpos ) ] <= ~clear_tree2d ? {1'b1, (OUTWIDTH)'(0)} : {1'b0, wrtree2d}; + mem_tree2d[ (~clear_tree2d ? clearidx : tpos ) ] <= ~clear_tree2d ? {1'b1, {(OUTWIDTH){1'b0}}} : {1'b0, wrtree2d}; always @ (posedge clk) - {rdfilled, rddata} <= mem_tree2d[ (clogb2(2*NUMCODES-1))'(alldone ? rdaddr : ntpos ) ]; + {rdfilled, rddata} <= mem_tree2d[ (alldone ? rdaddr : ntpos ) ]; endmodule diff --git a/RTL/huffman_decoder.sv b/RTL/huffman_decoder.v similarity index 65% rename from RTL/huffman_decoder.sv rename to RTL/huffman_decoder.v index 706ef31..50c2b39 100644 --- a/RTL/huffman_decoder.sv +++ b/RTL/huffman_decoder.v @@ -2,7 +2,7 @@ //-------------------------------------------------------------------------------------------------------- // Module : huffman_decoder // Type : synthesizable, IP's sub module -// Standard: SystemVerilog 2005 (IEEE1800-2005) +// Standard: Verilog 2001 (IEEE1364-2001) //-------------------------------------------------------------------------------------------------------- module huffman_decoder #( @@ -10,18 +10,24 @@ module huffman_decoder #( parameter OUTWIDTH = 10 )( rstn, clk, - istart, - ien, ibit, + istart, ien, ibit, oen, ocode, rdaddr, rddata ); -function automatic integer clogb2(input integer val); + +function integer clogb2; + input integer val; +//function automatic integer clogb2(input integer val); integer valtmp; +begin valtmp = val; - for(clogb2=0; valtmp>0; clogb2=clogb2+1) valtmp = valtmp>>1; + for (clogb2=0; valtmp>0; clogb2=clogb2+1) + valtmp = valtmp>>1; +end endfunction + input rstn, clk; input istart, ien, ibit; output oen; @@ -32,37 +38,41 @@ input [ OUTWIDTH-1:0] rddata; wire rstn, clk; wire istart, ien, ibit; reg oen = 1'b0; -reg [ OUTWIDTH-1:0] ocode = '0; +reg [ OUTWIDTH-1:0] ocode = 0; wire [clogb2(2*NUMCODES-1)-1:0] rdaddr; wire [ OUTWIDTH-1:0] rddata; -reg [clogb2(2*NUMCODES-1)-2:0] tpos = '0; +reg [clogb2(2*NUMCODES-1)-2:0] tpos = 0; wire [clogb2(2*NUMCODES-1)-2:0] ntpos; reg ienl = 1'b0; assign rdaddr = {ntpos, ibit}; -assign ntpos = ienl ? (clogb2(2*NUMCODES-1)-1)'(rddata<(OUTWIDTH)'(NUMCODES) ? '0 : rddata-(OUTWIDTH)'(NUMCODES)) : tpos; +assign ntpos = ienl ? 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