From b8ed832fcda8e55a1e02766d3f933663fce75157 Mon Sep 17 00:00:00 2001 From: JefferyLi0903 Date: Mon, 4 Apr 2022 22:08:45 +0800 Subject: [PATCH] Update --- project/MMC.al | 62 +++++++---- project/td_2022-04-04_21-23-24.log | 172 +++++++++++++++++++++++++++++ src/peripherals/IQbuffer.v | 15 +-- src/peripherals/RF.v | 34 ++++++ 4 files changed, 249 insertions(+), 34 deletions(-) create mode 100644 project/td_2022-04-04_21-23-24.log create mode 100644 src/peripherals/RF.v diff --git a/project/MMC.al b/project/MMC.al index 14d6db7..b8f915d 100644 --- a/project/MMC.al +++ b/project/MMC.al @@ -1,6 +1,6 @@ - + 2022-04-04 21:23:23 5.0.43066 11000000 MMC @@ -10,7 +10,7 @@ - + @@ -18,7 +18,7 @@ - + @@ -26,7 +26,7 @@ - + @@ -34,7 +34,7 @@ - + @@ -42,7 +42,7 @@ - + @@ -50,7 +50,7 @@ - + @@ -58,7 +58,7 @@ - + @@ -66,7 +66,7 @@ - + @@ -74,7 +74,7 @@ - + @@ -82,7 +82,7 @@ - + @@ -90,7 +90,7 @@ - + @@ -98,7 +98,7 @@ - + @@ -106,7 +106,7 @@ - + @@ -114,7 +114,7 @@ - + @@ -122,7 +122,7 @@ - + @@ -130,7 +130,7 @@ - + @@ -138,7 +138,7 @@ - + @@ -146,7 +146,7 @@ - + @@ -154,7 +154,7 @@ - + @@ -162,7 +162,7 @@ - + @@ -170,6 +170,22 @@ + + + + + + + + + + + + + + + + @@ -190,8 +206,8 @@ - 2022-04-02 18:38:49.884 - 60 + 2022-04-04 21:24:25.051 + 0 true diff --git a/project/td_2022-04-04_21-23-24.log b/project/td_2022-04-04_21-23-24.log new file mode 100644 index 0000000..7985506 --- /dev/null +++ b/project/td_2022-04-04_21-23-24.log @@ -0,0 +1,172 @@ +============================================================ + Tang Dynasty, V5.0.43066 + Copyright: Shanghai Anlogic Infotech Co., Ltd. + 2011 - 2021 + Executable = D:/Anlogic/TD5.0.43066/bin/td.exe + Built at = 20:38:48 Nov 30 2021 + Run by = JefferyLi + Run Date = Mon Apr 4 21:23:24 2022 + + Run on = LAPTOP-3NKS5JFR +============================================================ +RUN-1002 : start command "import_device eagle_s20.db -package BG256" +ARC-1001 : Device Initialization. +ARC-1001 : ------------------------------------------------------------------ +ARC-1001 : OPTION | IO | SETTING +ARC-1001 : ------------------------------------------------------------------ +ARC-1001 : cso_b/cclk/mosi/miso/dout | T3/R11/T10/P10/S11 | gpio +ARC-1001 : done | P13 | gpio +ARC-1001 : program_b | T2 | dedicate +ARC-1001 : tdi/tms/tck/tdo | C12/A15/C14/E14 | dedicate +ARC-1001 : ------------------------------------------------------------------ +ARC-1004 : Device setting, marked 5 dedicate IOs in total. +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_Block_RAM.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_Decoder.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_Interconnect.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_SlaveMUX.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_UART.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_IQfetcher.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_WaterLight.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_Block_RAM.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_Decoder.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_Interconnect.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_SlaveMUX.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_UART.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_IQfetcher.v is missing! +GUI-8003 ERROR: ../src/AHBmanager/AHBlite_WaterLight.v is missing! +RUN-1001 : Print Global Property +RUN-1001 : ------------------------------------------------------- +RUN-1001 : Parameters | Settings | Default Values +RUN-1001 : ------------------------------------------------------- +RUN-1001 : message | standard | standard +RUN-1001 : mixed_pack_place_flow | on | on +RUN-1001 : syn_ip_flow | off | off +RUN-1001 : thread | auto | auto +RUN-1001 : ------------------------------------------------------- +RUN-1001 : Print Design Property +RUN-1001 : ------------------------------------------------------ +RUN-1001 : Parameters | Settings | Default Values +RUN-1001 : ------------------------------------------------------ +RUN-1001 : default_reg_initial | auto | auto +RUN-1001 : infer_add | on | on +RUN-1001 : infer_fsm | off | off +RUN-1001 : infer_mult | on | on +RUN-1001 : infer_ram | on | on +RUN-1001 : infer_reg | on | on +RUN-1001 : infer_reg_init_value | on | on +RUN-1001 : infer_rom | on | on +RUN-1001 : infer_shifter | off | off +RUN-1001 : map_dram | auto | auto +RUN-1001 : ------------------------------------------------------ +RUN-1001 : Print Rtl Property +RUN-1001 : ------------------------------------------------------ +RUN-1001 : Parameters | Settings | Default Values +RUN-1001 : ------------------------------------------------------ +RUN-1001 : compress_add | ripple | ripple +RUN-1001 : elf_sload | off | off +RUN-1001 : fix_undriven | 0 | 0 +RUN-1001 : flatten | off | off +RUN-1001 : gate_sharing | on | on +RUN-1001 : hdl_warning_level | normal | normal +RUN-1001 : impl_internal_tribuf | on | on +RUN-1001 : impl_set_reset | on | on +RUN-1001 : infer_gsr | off | off +RUN-1001 : keep_hierarchy | auto | auto +RUN-1001 : max_fanout | 9999 | 9999 +RUN-1001 : max_oh2bin_len | 10 | 10 +RUN-1001 : merge_equal | on | on +RUN-1001 : merge_equiv | on | on +RUN-1001 : merge_mux | off | off +RUN-1001 : min_ce_fanout | 16 | 16 +RUN-1001 : min_ripple_len | auto | auto +RUN-1001 : oh2bin_ratio | 0.08 | 0.08 +RUN-1001 : opt_adder_fanout | on | on +RUN-1001 : opt_arith | on | on +RUN-1001 : opt_big_gate | off | off +RUN-1001 : opt_const | on | on +RUN-1001 : opt_const_mult | on | on +RUN-1001 : opt_lessthan | on | on +RUN-1001 : opt_mux | off | off +RUN-1001 : opt_ram | high | high +RUN-1001 : rtl_sim_model | off | off +RUN-1001 : seq_syn | on | on +RUN-1001 : ------------------------------------------------------ +HDL-1007 : analyze verilog file ../src/demodulation/Mul.v +HDL-1007 : analyze verilog file ../src/demodulation/demodulation.v +HDL-1007 : analyze verilog file ../src/peripherals/Block_RAM.v +HDL-1007 : analyze verilog file ../src/peripherals/FIFO.v +HDL-1007 : analyze verilog file ../src/peripherals/UART_RX.v +HDL-1007 : analyze verilog file ../src/peripherals/UART_TX.v +HDL-1007 : analyze verilog file ../src/peripherals/clkuart_pwm.v +HDL-1007 : analyze verilog file ../src/topmodule/CortexM0_SoC.v +HDL-1007 : analyze verilog file ../src/topmodule/cortexm0ds_logic.v +HDL-1007 : analyze verilog file al_ip/clkdivider.v +HDL-1007 : analyze verilog file al_ip/IQ_ADC.v +HDL-1007 : analyze verilog file ../src/peripherals/IQfetcher.v +HDL-1007 : analyze verilog file ../src/peripherals/WaterLight.v +RUN-1001 : Print Global Property +RUN-1001 : ------------------------------------------------------- +RUN-1001 : Parameters | Settings | Default Values +RUN-1001 : ------------------------------------------------------- +RUN-1001 : message | standard | standard +RUN-1001 : mixed_pack_place_flow | on | on +RUN-1001 : syn_ip_flow | off | off +RUN-1001 : thread | auto | auto +RUN-1001 : ------------------------------------------------------- +RUN-1001 : Print Design Property +RUN-1001 : ------------------------------------------------------ +RUN-1001 : Parameters | Settings | Default Values +RUN-1001 : ------------------------------------------------------ +RUN-1001 : default_reg_initial | auto | auto +RUN-1001 : infer_add | on | on +RUN-1001 : infer_fsm | off | off +RUN-1001 : infer_mult | on | on +RUN-1001 : infer_ram | on | on +RUN-1001 : infer_reg | on | on +RUN-1001 : infer_reg_init_value | on | on +RUN-1001 : infer_rom | on | on +RUN-1001 : infer_shifter | off | off +RUN-1001 : map_dram | auto | auto +RUN-1001 : ------------------------------------------------------ +RUN-1001 : Print Rtl Property +RUN-1001 : ------------------------------------------------------ +RUN-1001 : Parameters | Settings | Default Values +RUN-1001 : ------------------------------------------------------ +RUN-1001 : compress_add | ripple | ripple +RUN-1001 : elf_sload | off | off +RUN-1001 : fix_undriven | 0 | 0 +RUN-1001 : flatten | off | off +RUN-1001 : gate_sharing | on | on +RUN-1001 : hdl_warning_level | normal | normal +RUN-1001 : impl_internal_tribuf | on | on +RUN-1001 : impl_set_reset | on | on +RUN-1001 : infer_gsr | off | off +RUN-1001 : keep_hierarchy | auto | auto +RUN-1001 : max_fanout | 9999 | 9999 +RUN-1001 : max_oh2bin_len | 10 | 10 +RUN-1001 : merge_equal | on | on +RUN-1001 : merge_equiv | on | on +RUN-1001 : merge_mux | off | off +RUN-1001 : min_ce_fanout | 16 | 16 +RUN-1001 : min_ripple_len | auto | auto +RUN-1001 : oh2bin_ratio | 0.08 | 0.08 +RUN-1001 : opt_adder_fanout | on | on +RUN-1001 : opt_arith | on | on +RUN-1001 : opt_big_gate | off | off +RUN-1001 : opt_const | on | on +RUN-1001 : opt_const_mult | on | on +RUN-1001 : opt_lessthan | on | on +RUN-1001 : opt_mux | off | off +RUN-1001 : opt_ram | high | high +RUN-1001 : rtl_sim_model | off | off +RUN-1001 : seq_syn | on | on +RUN-1001 : ------------------------------------------------------ +HDL-1007 : analyze verilog file ../src/AHBsubordinate/AHBlite_Block_RAM.v +HDL-1007 : analyze verilog file ../src/AHBsubordinate/AHBlite_Decoder.v +HDL-1007 : analyze verilog file ../src/AHBsubordinate/AHBlite_IQfetcher.v +HDL-1007 : analyze verilog file ../src/AHBsubordinate/AHBlite_Interconnect.v +HDL-1007 : analyze verilog file ../src/AHBsubordinate/AHBlite_SlaveMUX.v +HDL-1007 : analyze verilog file ../src/AHBsubordinate/AHBlite_UART.v +HDL-1007 : analyze verilog file ../src/AHBsubordinate/AHBlite_WaterLight.v +HDL-1007 : analyze verilog file ../src/peripherals/IQbuffer.v +HDL-1007 : analyze verilog file ../src/peripherals/RF.v diff --git a/src/peripherals/IQbuffer.v b/src/peripherals/IQbuffer.v index 6530473..c0f7dd1 100644 --- a/src/peripherals/IQbuffer.v +++ b/src/peripherals/IQbuffer.v @@ -8,23 +8,16 @@ module IQbuffer( ); reg wr_rq_1 = 0; reg wr_rq_2 = 1; - reg wr_reg = 0; - reg flag=0; + reg [1:0] flag=0; reg [11:0] dout_1 = 0; reg [11:0] dout_2 = 0; - always@(posedge clk) begin - if((writerq==1)&&(flag==1)) wr_reg<=1; - else begin - wr_reg<=0; - flag<=1; - end - end - always@(posedge writerq) flag=1; + always@(posedge writerq) flag=2; always@(posedge clk) begin - if (wr_reg==1) begin + if (flag!=0) begin wr_rq_1 <= ~wr_rq_1; wr_rq_2 <= ~wr_rq_2; + flag<=flag-1; end end FIFO #(.data_width(12)) bf1( diff --git a/src/peripherals/RF.v b/src/peripherals/RF.v new file mode 100644 index 0000000..1db379a --- /dev/null +++ b/src/peripherals/RF.v @@ -0,0 +1,34 @@ +module SPI_24bit( + input clk, + input counter_en, + input RSTn, + output reg [23:0] reg_val +); + reg [23:0] mat [6:1]; + reg [23:0] r0 = 24'h043420; + reg [23:0] r5 = 24'h28bb85; + reg [23:0] r2 = 24'h1f1902; + reg [23:0] r1 = 24'h00c0a1; + reg [23:0] r6 = 24'h200016; + reg [23:0] r3 = 24'h00fa03; + reg [2:0] counter; + initial + begin + mat[6]=r0; + mat[5]=r5; + mat[4]=r2; + mat[3]=r1; + mat[2]=r6; + mat[1]=r3; + end + always@(posedge clk) begin + if(counter!=0) begin + reg_val <= mat[counter]; + end + end + always@(negedge clk or negedge RSTn) begin + if (~RSTn) counter<=6; + else if (counter_en&(counter!=0)) counter<=counter-1; + end +endmodule +