MMC/project/MMC_place.area
2022-06-29 13:15:53 +08:00

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***Report Model: CortexM0_SoC***
IO Statistics
#IO 39
#input 8
#output 30
#inout 1
Utilization Statistics
#lut 16581 out of 19600 84.60%
#reg 2517 out of 19600 12.84%
#le 16834
#lut only 14317 out of 16834 85.05%
#reg only 253 out of 16834 1.50%
#lut&reg 2264 out of 16834 13.45%
#dsp 26 out of 29 89.66%
#bram 32 out of 64 50.00%
#bram9k 32
#fifo9k 0
#bram32k 6 out of 16 37.50%
#adc 1 out of 1 100.00%
#pad 39 out of 186 20.97%
#ireg 0
#oreg 0
#treg 0
#pll 2 out of 4 50.00%
Detailed IO Report
Name Direction Location IOStandard DriveStrength PullType PackReg
RSTn INPUT A14 LVCMOS33 N/A PULLUP NONE
RXD INPUT F12 LVCMOS33 N/A PULLUP NONE
SWCLK INPUT R2 LVCMOS33 N/A PULLUP NONE
clk INPUT R7 LVCMOS33 N/A PULLUP NONE
col[3] INPUT F10 LVTTL33 N/A PULLUP NONE
col[2] INPUT C11 LVTTL33 N/A PULLUP NONE
col[1] INPUT D11 LVTTL33 N/A PULLUP NONE
col[0] INPUT E11 LVTTL33 N/A PULLUP NONE
LED[7] OUTPUT F16 LVCMOS33 8 NONE NONE
LED[6] OUTPUT E16 LVCMOS33 8 NONE NONE
LED[5] OUTPUT E13 LVCMOS33 8 NONE NONE
LED[4] OUTPUT C16 LVCMOS33 8 NONE NONE
LED[3] OUTPUT C15 LVCMOS33 8 NONE NONE
LED[2] OUTPUT B16 LVCMOS33 8 NONE NONE
LED[1] OUTPUT B15 LVCMOS33 8 NONE NONE
LED[0] OUTPUT B14 LVCMOS33 8 NONE NONE
MSI_CS OUTPUT P9 LVCMOS33 8 NONE NONE
MSI_REFCLK OUTPUT R15 LVCMOS33 8 NONE NONE
MSI_SCLK OUTPUT M9 LVCMOS33 8 NONE NONE
MSI_SDATA OUTPUT N9 LVCMOS33 8 NONE NONE
TXD OUTPUT D12 LVCMOS33 8 NONE NONE
audio_pwm OUTPUT N8 LVCMOS33 8 NONE NONE
row[3] OUTPUT D9 LVTTL33 8 NONE NONE
row[2] OUTPUT F9 LVTTL33 8 NONE NONE
row[1] OUTPUT C10 LVTTL33 8 NONE NONE
row[0] OUTPUT E10 LVTTL33 8 NONE NONE
seg[7] OUTPUT C8 LVCMOS33 8 NONE NONE
seg[6] OUTPUT A8 LVCMOS33 8 NONE NONE
seg[5] OUTPUT B5 LVCMOS33 8 NONE NONE
seg[4] OUTPUT A7 LVCMOS33 8 NONE NONE
seg[3] OUTPUT E8 LVCMOS33 8 NONE NONE
seg[2] OUTPUT B8 LVCMOS33 8 NONE NONE
seg[1] OUTPUT A6 LVCMOS33 8 NONE NONE
seg[0] OUTPUT A4 LVCMOS33 8 NONE NONE
sel[3] OUTPUT A3 LVCMOS33 8 NONE NONE
sel[2] OUTPUT A5 LVCMOS33 8 NONE NONE
sel[1] OUTPUT B6 LVCMOS33 8 NONE NONE
sel[0] OUTPUT C9 LVCMOS33 8 NONE NONE
SWDIO INOUT P2 LVCMOS33 8 PULLUP NONE
Report Hierarchy Area:
+----------------------------------------------------------------------+
|Instance |Module |le |lut |ripple |seq |bram |dsp |
+----------------------------------------------------------------------+
|top |CortexM0_SoC |16834 |16108 |473 |2517 |38 |26 |
+----------------------------------------------------------------------+