mirror of
https://github.com/JefferyLi0903/MMC.git
synced 2025-01-22 10:22:53 +08:00
79 lines
5.1 KiB
Plaintext
79 lines
5.1 KiB
Plaintext
standard
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***Report Model: CortexM0_SoC***
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IO Statistics
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#IO 39
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#input 8
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#output 30
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#inout 1
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Utilization Statistics
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#lut 16581 out of 19600 84.60%
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#reg 2517 out of 19600 12.84%
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#le 16834
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#lut only 14317 out of 16834 85.05%
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#reg only 253 out of 16834 1.50%
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#lut® 2264 out of 16834 13.45%
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#dsp 26 out of 29 89.66%
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#bram 32 out of 64 50.00%
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#bram9k 32
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#fifo9k 0
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#bram32k 6 out of 16 37.50%
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#adc 1 out of 1 100.00%
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#pad 39 out of 186 20.97%
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#ireg 0
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#oreg 0
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#treg 0
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#pll 2 out of 4 50.00%
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Detailed IO Report
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Name Direction Location IOStandard DriveStrength PullType PackReg
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RSTn INPUT A14 LVCMOS33 N/A PULLUP NONE
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RXD INPUT F12 LVCMOS33 N/A PULLUP NONE
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SWCLK INPUT R2 LVCMOS33 N/A PULLUP NONE
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clk INPUT R7 LVCMOS33 N/A PULLUP NONE
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col[3] INPUT F10 LVTTL33 N/A PULLUP NONE
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col[2] INPUT C11 LVTTL33 N/A PULLUP NONE
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col[1] INPUT D11 LVTTL33 N/A PULLUP NONE
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col[0] INPUT E11 LVTTL33 N/A PULLUP NONE
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LED[7] OUTPUT F16 LVCMOS33 8 NONE NONE
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LED[6] OUTPUT E16 LVCMOS33 8 NONE NONE
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LED[5] OUTPUT E13 LVCMOS33 8 NONE NONE
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LED[4] OUTPUT C16 LVCMOS33 8 NONE NONE
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LED[3] OUTPUT C15 LVCMOS33 8 NONE NONE
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LED[2] OUTPUT B16 LVCMOS33 8 NONE NONE
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LED[1] OUTPUT B15 LVCMOS33 8 NONE NONE
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LED[0] OUTPUT B14 LVCMOS33 8 NONE NONE
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MSI_CS OUTPUT P9 LVCMOS33 8 NONE NONE
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MSI_REFCLK OUTPUT R15 LVCMOS33 8 NONE NONE
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MSI_SCLK OUTPUT M9 LVCMOS33 8 NONE NONE
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MSI_SDATA OUTPUT N9 LVCMOS33 8 NONE NONE
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TXD OUTPUT D12 LVCMOS33 8 NONE NONE
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audio_pwm OUTPUT N8 LVCMOS33 8 NONE NONE
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row[3] OUTPUT D9 LVTTL33 8 NONE NONE
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row[2] OUTPUT F9 LVTTL33 8 NONE NONE
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row[1] OUTPUT C10 LVTTL33 8 NONE NONE
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row[0] OUTPUT E10 LVTTL33 8 NONE NONE
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seg[7] OUTPUT C8 LVCMOS33 8 NONE NONE
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seg[6] OUTPUT A8 LVCMOS33 8 NONE NONE
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seg[5] OUTPUT B5 LVCMOS33 8 NONE NONE
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seg[4] OUTPUT A7 LVCMOS33 8 NONE NONE
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seg[3] OUTPUT E8 LVCMOS33 8 NONE NONE
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seg[2] OUTPUT B8 LVCMOS33 8 NONE NONE
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seg[1] OUTPUT A6 LVCMOS33 8 NONE NONE
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seg[0] OUTPUT A4 LVCMOS33 8 NONE NONE
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sel[3] OUTPUT A3 LVCMOS33 8 NONE NONE
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sel[2] OUTPUT A5 LVCMOS33 8 NONE NONE
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sel[1] OUTPUT B6 LVCMOS33 8 NONE NONE
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sel[0] OUTPUT C9 LVCMOS33 8 NONE NONE
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SWDIO INOUT P2 LVCMOS33 8 PULLUP NONE
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Report Hierarchy Area:
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+----------------------------------------------------------------------+
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|Instance |Module |le |lut |ripple |seq |bram |dsp |
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+----------------------------------------------------------------------+
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|top |CortexM0_SoC |16834 |16108 |473 |2517 |38 |26 |
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+----------------------------------------------------------------------+
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