2020-07-22 22:29:09 +08:00
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`timescale 1ns / 1ps
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// `include "../inc/sm3_cfg"
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`include "sm3_cfg.v"
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//////////////////////////////////////////////////////////////////////////////////
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// Author: ljgibbs / lf_gibbs@163.com
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// Create Date: 2020/07/22
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// Design Name: sm3
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// Module Name: sm3_if
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// Description:
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// SM3 总线定义
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// 分为 pad/expnd/cmprss/monitor 类型
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// Dependencies:
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// inc/sm3_cfg.v
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// Revision:
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// Revision 0.01 - File Created
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//////////////////////////////////////////////////////////////////////////////////
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interface sm3_if;
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logic clk;
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logic rst_n;
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logic [`INPT_DW1:0] msg_inpt_d_i;
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logic [`INPT_BYTE_DW1:0] msg_inpt_vld_byte_i;
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logic msg_inpt_vld_i;
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logic msg_inpt_lst_i;
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logic pad_otpt_ena_i;
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logic msg_inpt_rdy_o;
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2020-07-23 10:47:09 +08:00
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logic [`INPT_DW1:0] pad_otpt_d_o;
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2020-07-22 22:29:09 +08:00
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logic pad_otpt_lst_o;
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logic pad_otpt_vld_o;
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modport PAD (
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input clk,rst_n,msg_inpt_d_i,msg_inpt_vld_byte_i,msg_inpt_vld_i,msg_inpt_lst_i,pad_otpt_ena_i,
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output msg_inpt_rdy_o,pad_otpt_d_o,pad_otpt_lst_o,pad_otpt_vld_o
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);
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endinterface //sm3_if
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