From 32949049312ada19b7dcf1ea01a80703b974f684 Mon Sep 17 00:00:00 2001 From: lf <15201710458@163.com> Date: Wed, 29 Jul 2020 16:41:30 +0800 Subject: [PATCH] add sm3 top rtl&tb --- rtl/if/sm3_if.sv | 6 +- rtl/inc/sm3_cfg.v | 7 +- rtl/sm3_core_top.sv | 71 ++++++ sim/script/run_sm3_core_top_tb_wth_cmodel.do | 43 ++++ sim/tb/tb_sm3_core_top.sv | 249 +++++++++++++++++++ 5 files changed, 373 insertions(+), 3 deletions(-) create mode 100644 rtl/sm3_core_top.sv create mode 100644 sim/script/run_sm3_core_top_tb_wth_cmodel.do create mode 100644 sim/tb/tb_sm3_core_top.sv diff --git a/rtl/if/sm3_if.sv b/rtl/if/sm3_if.sv index 0a7ddb9..f030908 100644 --- a/rtl/if/sm3_if.sv +++ b/rtl/if/sm3_if.sv @@ -8,7 +8,7 @@ // Module Name: sm3_if // Description: // SM3 总线定义 -// 分为 pad/expnd/cmprss/monitor 类型 +// 分为 pad/expnd/cmprss/monitor/top 类型 // Dependencies: // inc/sm3_cfg.v // Revision: @@ -56,5 +56,9 @@ modport CMPRSS ( output cmprss_otpt_res,cmprss_otpt_vld ); +modport TOP ( + input clk,rst_n,msg_inpt_d,msg_inpt_vld_byte,msg_inpt_vld,msg_inpt_lst, + output msg_inpt_rdy,cmprss_otpt_res,cmprss_otpt_vld +); endinterface //sm3_if \ No newline at end of file diff --git a/rtl/inc/sm3_cfg.v b/rtl/inc/sm3_cfg.v index 588d4e2..bc39717 100644 --- a/rtl/inc/sm3_cfg.v +++ b/rtl/inc/sm3_cfg.v @@ -15,14 +15,17 @@ `define DESIGN_SIM // `define DESIGN_SYNT -//模块调试开关 +//模块调试开关----------------------------- `ifdef DESIGN_SIM //`define SM3_PAD_SIM_DBG - `define SM3_EXPND_SIM_DBG + //`define SM3_EXPND_SIM_DBG // `define SM3_CMPRS_SIM_DBG // `define SM3_CMPRS_SIM_FILE_LOG `endif +//C模型相关设置---------------------------- +// `define C_MODEL_SELF_TEST + //定义 SM3 输入位宽------------------------ `define SM3_INPT_DW_32 // `define SM3_INPT_DW_64 diff --git a/rtl/sm3_core_top.sv b/rtl/sm3_core_top.sv new file mode 100644 index 0000000..a1dca8a --- /dev/null +++ b/rtl/sm3_core_top.sv @@ -0,0 +1,71 @@ +`timescale 1ns / 1ps +// `include "./inc/sm3_cfg.v" +`include "sm3_cfg.v" +////////////////////////////////////////////////////////////////////////////////// +// Author: ljgibbs / lf_gibbs@163.com +// Create Date: 2020/07/29 +// Design Name: sm3 +// Module Name: sm3_core_top +// Description: +// SM3 顶层模块，例化下层的 SM3 填充、扩展以及迭代压缩三个模块 +// 输入位宽：INPT_DW1 定义，支持32/64 +// 输出位宽：与输入位宽一致 +// Dependencies: +// inc/sm3_cfg.v +// Revision: +// Revision 0.01 - File Created +////////////////////////////////////////////////////////////////////////////////// +module sm3_core_top ( + sm3_if.TOP top +); + +//interface +sm3_if int_if(); + +sm3_pad_core U_sm3_pad_core( + .clk (top.clk ), + .rst_n (top.rst_n ), + + .msg_inpt_d_i (top.msg_inpt_d ), + .msg_inpt_vld_byte_i (top.msg_inpt_vld_byte ), + .msg_inpt_vld_i (top.msg_inpt_vld ), + .msg_inpt_lst_i (top.msg_inpt_lst ), + + .pad_otpt_ena_i (int_if.pad_otpt_ena ), + + .msg_inpt_rdy_o (top.msg_inpt_rdy ), + + .pad_otpt_d_o (int_if.pad_otpt_d ), + .pad_otpt_lst_o (int_if.pad_otpt_lst ), + .pad_otpt_vld_o (int_if.pad_otpt_vld ) +); + +sm3_expnd_core U_sm3_expnd_core( + .clk (top.clk ), + .rst_n (top.rst_n ), + + .pad_inpt_d_i ( int_if.pad_otpt_d ), + .pad_inpt_vld_i ( int_if.pad_otpt_vld ), + .pad_inpt_lst_i ( int_if.pad_otpt_lst ), + + .pad_inpt_rdy_o ( int_if.pad_otpt_ena ), + .expnd_otpt_wj_o ( int_if.expnd_otpt_wj ), + .expnd_otpt_wjj_o ( int_if.expnd_otpt_wjj ), + .expnd_otpt_lst_o ( int_if.expnd_otpt_lst ), + .expnd_otpt_vld_o ( int_if.expnd_otpt_vld ) +); + +sm3_cmprss_core U_sm3_cmprss_core( + .clk (top.clk ), + .rst_n (top.rst_n ), + + .expnd_inpt_wj_i ( int_if.expnd_otpt_wj ), + .expnd_inpt_wjj_i ( int_if.expnd_otpt_wjj ), + .expnd_inpt_lst_i ( int_if.expnd_otpt_lst ), + .expnd_inpt_vld_i ( int_if.expnd_otpt_vld ), + + .cmprss_otpt_res_o ( top.cmprss_otpt_res ), + .cmprss_otpt_vld_o ( top.cmprss_otpt_vld ) +); + +endmodule \ No newline at end of file diff --git a/sim/script/run_sm3_core_top_tb_wth_cmodel.do b/sim/script/run_sm3_core_top_tb_wth_cmodel.do new file mode 100644 index 0000000..2250c6e --- /dev/null +++ b/sim/script/run_sm3_core_top_tb_wth_cmodel.do @@ -0,0 +1,43 @@ +#//////////////////////////////////////////////////////////////////////////////// +# Author: ljgibbs / lf_gibbs@163.com +# Create Date: 2020/07/29 +# Design Name: sm3 +# Module Name: run_sm3_core_top_tb_wth_cmodel +# Description: +# 运行 sm3 顶层 tb 的 Modelsim 脚本 +# - 使用相对路径 +# - 使用库 sm3_core +# - 与 C 模型结果比较 +# Revision: +# Revision 0.01 - File Created +#//////////////////////////////////////////////////////////////////////////////// + +vlib sm3_core + +vlog -64 -incr -work sm3_core "+incdir+../../rtl/inc" \ +"../../rtl/*.v" \ +"../../rtl/util/*.v" \ + +vlog -64 -incr -sv -work sm3_core "+incdir+../../rtl/inc" \ +"../../rtl/if/*.sv" \ +"../../rtl/*.sv" \ +"../../rtl/wrppr/*.sv" \ +"../sim_rtl/*.sv" \ + +#compile tb & c model +vlog -work sm3_core "+incdir+../../rtl/inc" \ +-sv -dpiheader ../../c_model/dpiheader.h\ + ../tb/tb_sm3_core_top.sv \ + ../../c_model/sm3.c + +vsim -voptargs="+acc" -t 1ps -L unisims_ver -L unimacro_ver -L secureip -lib sm3_core sm3_core.tb_sm3_core_top; +add wave * + +view wave +view structure +view signals +log -r /* + +add wave -position insertpoint sim:/tb_sm3_core_top/U_sm3_core_top/U_sm3_pad_core/* + +restart -f;run 200us diff --git a/sim/tb/tb_sm3_core_top.sv b/sim/tb/tb_sm3_core_top.sv new file mode 100644 index 0000000..e15227c --- /dev/null +++ b/sim/tb/tb_sm3_core_top.sv @@ -0,0 +1,249 @@ +`timescale 1ns / 1ps +`include "sm3_cfg.v" +////////////////////////////////////////////////////////////////////////////////// +// Author: ljgibbs / lf_gibbs@163.com +// Create Date: 2020/07/29 +// Design Name: sm3 +// Module Name: tb_sm3_core_top +// Description: +// SM3 顶层 testbench +// 测试 sm3_core_top +// Dependencies: +// inc/sm3_cfg.v +// Revision: +// Revision 0.01 - File Created +// Revision 0.02 - Pass random test with c model +////////////////////////////////////////////////////////////////////////////////// +module tb_sm3_core_top ( +); + +`ifdef SM3_INPT_DW_32 + localparam [1:0] INPT_WORD_NUM = 2'd1; +`elsif SM3_INPT_DW_64 + localparam [1:0] INPT_WORD_NUM = 2'd2; +`endif + +//import c reference function +import "DPI-C" function void sm3_c(input int len,input bit[7:0] data[],output bit[31:0] res[]); + +int i; +bit [31:0] urand_num; +bit [7:0] data[1050]; +bit [31:0] res[8]; + +int stat_test_cnt; +int stat_ok_cnt; +int stat_fail_cnt; +bit [60:0] sm3_inpt_byte_num; + +//interface +sm3_if sm3if(); + +//sm3_core_top +sm3_core_top U_sm3_core_top( + sm3if +); + +initial begin + sm3if.clk = 0; + sm3if.rst_n = 0; + sm3if.msg_inpt_d = 0; + sm3if.msg_inpt_vld_byte = 4'b1111; + sm3if.msg_inpt_vld = 0; + sm3if.msg_inpt_lst = 0; + + #100; + sm3if.rst_n =1; + + while (1) begin + //complete random + //sm3_inpt_byte_num = $urandom % (61'h1fff_ffff_ffff_ffff) + 1; + //medium random + // sm3_inpt_byte_num = $urandom % (64*100) + 1; + + `ifdef C_MODEL_SELF_TEST + sm3_inpt_byte_num = 64; + `else + sm3_inpt_byte_num = ($urandom % 128 + 1 + 4); + `endif + + @(posedge sm3if.clk); + task_rndm_inpt_cmpr_cmodel(sm3_inpt_byte_num); + @(posedge sm3if.clk); + end + + +end + +always #5 sm3if.clk = ~sm3if.clk; + +//产生填充模块输入，随机输入，并与 c 语言参考模型比较 +task automatic task_rndm_inpt_cmpr_cmodel( + input bit [60:0] byte_num +); + bit [2:0] unalign_byte_num; + bit [55:0] data_inpt_clk_num; + + //根据总线位宽计算数据输入时钟数与非对齐的数据数量 + `ifdef SM3_INPT_DW_32 + unalign_byte_num = byte_num[1:0]; + data_inpt_clk_num = unalign_byte_num == 0 ? byte_num[60:2] : byte_num[60:2] + 1'b1; + `elsif SM3_INPT_DW_64 + unalign_byte_num = byte_num[2:0]; + data_inpt_clk_num = unalign_byte_num == 0 ? byte_num[60:3] : byte_num[60:3] + 1'b1; + `endif + + + // 初始化数组同时产生逻辑激励 + for(i = 0 ; i < data_inpt_clk_num - 1 ; i++)begin + sm3if.msg_inpt_vld = 1; + sm3if.msg_inpt_vld_byte = 4'b1111; + + `ifdef C_MODEL_SELF_TEST + urand_num = 32'h61626364; + `else + urand_num = ($urandom); + `endif + + {data[4*i],data[4*i+1],data[4*i+2],data[4*i+3]} = urand_num; + sm3if.msg_inpt_d = urand_num; + @(posedge sm3if.clk); + // $display("SV array b4 %d:%x", i,urand_num); + sm3if.msg_inpt_vld = 0; + @(posedge sm3if.clk); + wait(sm3if.msg_inpt_rdy == 1'b1); + @(posedge sm3if.clk); + end + sm3if.msg_inpt_vld = 1; + + //准备最后一个周期的数据 + + `ifdef C_MODEL_SELF_TEST + urand_num = 32'h61626364; + `else + urand_num = ($urandom); + `endif + + {data[4*i],data[4*i+1],data[4*i+2],data[4*i+3]} = urand_num; + + sm3if.msg_inpt_lst = 1; + + `ifdef SM3_INPT_DW_32 + lst_data_gntr_32(sm3if.msg_inpt_d,sm3if.msg_inpt_vld_byte,unalign_byte_num,urand_num); + `elsif SM3_INPT_DW_64 + lst_data_gntr_64(sm3if.msg_inpt_d,sm3if.msg_inpt_vld_byte,unalign_byte_num,urand_num); + `endif + + @(posedge sm3if.clk); + // $display("SV array b4 %d:%x", i,urand_num); + sm3if.msg_inpt_vld = 0; + sm3if.msg_inpt_lst = 0; + // sm3if.msg_inpt_vld_byte = 4'b1111; + + //调用c语言函数，以开放数组形式传参 + sm3_c(byte_num,data,res); + //统计信息 + wait(sm3if.cmprss_otpt_vld); + stat_test_cnt++; + if(sm3if.cmprss_otpt_res == + {res[0],res[1],res[2],res[3],res[4],res[5],res[6],res[7]}) + begin + stat_ok_cnt++; + $display("Res Correct!"); + end else begin + stat_fail_cnt++; + $display("Res Wrong with sm3_inpt_byte_num:%d!",sm3_inpt_byte_num); + $stop; + end + $display("Test %d times OK %d times,Fail %d times",stat_test_cnt,stat_ok_cnt,stat_fail_cnt); + + //打印返回的摘要值 + foreach(res[i]) + $display("SV array af %d:%x", i,res[i]); +endtask //automatic + + +//产生填充模块输入，采用示例输入 'abc' 32bit 输入 +task automatic task_pad_inpt_gntr_exmpl0_32(); + + + sm3if.msg_inpt_vld = 1'b1; + sm3if.msg_inpt_lst = 1'b1; + sm3if.msg_inpt_d = 32'h6162_6300; + sm3if.msg_inpt_vld_byte = 4'b1110; + @(posedge sm3if.clk); + sm3if.msg_inpt_vld = 1'b0; + sm3if.msg_inpt_lst = 1'b0; + sm3if.msg_inpt_d = 0; + +endtask //automatic + +//产生填充模块输入，采用示例输入 512bit 重复的 'abcd' 32bit 输入 +task automatic task_pad_inpt_gntr_exmpl1_32(); + + sm3if.msg_inpt_vld = 1'b1; + sm3if.msg_inpt_d = 32'h6162_6364; + sm3if.msg_inpt_vld_byte = 4'b1111; + repeat(15)begin + @(posedge sm3if.clk); + end + sm3if.msg_inpt_lst = 1'b1; + @(posedge sm3if.clk); + sm3if.msg_inpt_vld = 1'b0; + sm3if.msg_inpt_lst = 1'b0; + sm3if.msg_inpt_d = 0; + +endtask //automatic + +//32bit 生成最后一个周期数据 +`ifdef SM3_INPT_DW_32 +function automatic void lst_data_gntr_32( + ref logic [31:0] lst_data, + ref logic [ 3:0] lst_vld_byte, + input bit [2:0] unalign_byte_num, + input logic [31:0]rndm_data + ); + lst_vld_byte = unalign_byte_num == 2'd0 ? 4'b1111 + : unalign_byte_num == 2'd1 ? 4'b1000 + : unalign_byte_num == 2'd2 ? 4'b1100 + : unalign_byte_num == 2'd3 ? 4'b1110 + : 4'b1111; + lst_data = unalign_byte_num == 2'd0 ? {rndm_data} + : unalign_byte_num == 2'd1 ? {rndm_data[31-: 8], 24'd0} + : unalign_byte_num == 2'd2 ? {rndm_data[31-:16], 16'd0} + : unalign_byte_num == 2'd3 ? {rndm_data[31-:24], 8'd0} + : rndm_data; + +endfunction +`elsif SM3_INPT_DW_64 +//64bit 生成最后一个周期数据 +function automatic void lst_data_gntr_64( + ref logic [63:0] lst_data, + ref logic [ 7:0] lst_vld_byte, + input bit [3:0] unalign_byte_num, + input logic [31:0]rndm_data + ); + lst_vld_byte = unalign_byte_num == 3'd0 ? 8'b1111_1111 + : unalign_byte_num == 3'd1 ? 8'b1000_0000 + : unalign_byte_num == 3'd2 ? 8'b1100_0000 + : unalign_byte_num == 3'd3 ? 8'b1110_0000 + : unalign_byte_num == 3'd4 ? 8'b1111_0000 + : unalign_byte_num == 3'd5 ? 8'b1111_1000 + : unalign_byte_num == 3'd6 ? 8'b1111_1100 + : unalign_byte_num == 3'd7 ? 8'b1111_1110 + : 8'b1111_1111; + lst_data = unalign_byte_num == 3'd0 ? {rndm_data} + : unalign_byte_num == 3'd1 ? {rndm_data[63-: 8], 56'd0} + : unalign_byte_num == 3'd2 ? {rndm_data[63-:16], 48'd0} + : unalign_byte_num == 3'd3 ? {rndm_data[63-:24], 40'd0} + : unalign_byte_num == 3'd4 ? {rndm_data[63-:32], 32'd0} + : unalign_byte_num == 3'd5 ? {rndm_data[63-:40], 24'd0} + : unalign_byte_num == 3'd6 ? {rndm_data[63-:48], 16'd0} + : unalign_byte_num == 3'd7 ? {rndm_data[63-:56], 8'd0} + : rndm_data; + +endfunction +`endif + + +endmodule \ No newline at end of file