From 42827c6acd36d8d00e94415c09f4ecc88ae8c07a Mon Sep 17 00:00:00 2001 From: lf <15201710458@163.com> Date: Sat, 3 Oct 2020 14:38:22 +0800 Subject: [PATCH] v0.3 add basic support to EpicSim --- README.md | 40 +++++++++++--- rtl/inc/sm3_cfg.v | 6 ++- rtl/sm3_core_top.sv | 53 ++++++++++++++++--- sim/run/run_sim.bat | 7 ++- .../epicsim_sm3_core_top_tb.sh | 3 +- sim/tb/tb_sm3_core_top.sv | 46 +++++++++++++--- 6 files changed, 132 insertions(+), 23 deletions(-) rename sim/{script => run_epicsim}/epicsim_sm3_core_top_tb.sh (52%) diff --git a/README.md b/README.md index 5b62b44..7b6ee0f 100644 --- a/README.md +++ b/README.md @@ -25,7 +25,12 @@ SM3算法采用Merkle-Damgård结构，消息分组长度512比特，摘要结 - 输入与内部运算位宽可为 32/64 比特 - 64 比特版本中，迭代压缩采用**二度展开**算法 - 单个消息块运算时钟周期为 65 (32 bit) / 33 (64 bit) -- 最大吞吐(FPGA : //TODO ASIC: //TODO) +- 最大吞吐 + - FPGA : + - 1875.5Mbps(32 bit) + - 1963.7Mbps(64 bit) + - ASIC: + - //TODO ### 接口 @@ -86,6 +91,26 @@ SM3_core 目前提供了一个基于 Modelsim 与 Windows 10 的测试平台， //TODO 若运行遇到问题，欢迎提出 issue +#### 运行测试（EpicSim） + +目前增加了对于开源仿真器 EpicSim 的初步支持，运行一个固定的 SM3 示例，目前暂不支持 DPI 相关功能。 + +用户可以通过 sim/run_epicsim/epicsim_sm3_core_top_tb.sh 启动测试平台。此外，在 sm3_cfg.v 打开或关闭下列宏开关： + +- 打开 SM3_INPT_DW_32，目前仅支持 32 位 +- 打开 SM3_CMPRSS_DIRECT_ADD，使用加法符'+'，使工具推断相关电路 +- 关闭 C_MODEL_ENABLE，目前暂不支持 DPI 相关功能 +- 打开 EPICSIM ，选择仿真器 +- 打开 VCD_DUMP_ENABLE， 使能波形 dump + +工具在运行完成后产生波形文件，使用 GTKWave 查看 + +``` +gtkwave ./sm3_example.vcd +``` + +目前已经测试的 EpicSim 版本与环境：v1.0.2 on CentOS6 + #### 实现 - FPGA： @@ -115,12 +140,13 @@ SM3_core 目前提供了一个基于 Modelsim 与 Windows 10 的测试平台， ### 更新 -| 版本 | 更新时间 | 更新内容 | -| ---- | --------- | ---------------------------- | -| v0.1 | 2020.7.29 | First release | -| v0.2 | 2020.8.5 | 1.增加对 64 比特总线的支持 | -| | | 2.在 FPGA 平台分析性能与资源 | -| | | 3.修正 BUG | +| 版本 | 更新时间 | 更新内容 | +| ---- | --------- | ----------------------------------- | +| v0.1 | 2020.7.29 | First release | +| v0.2 | 2020.8.5 | 1.增加对 64 比特总线的支持 | +| | | 2.在 FPGA 平台分析性能与资源 | +| | | 3.修正 BUG | +| v0.3 | 2020.10.3 | 增加对开源仿真器 EpicSim 的初步支持 | ### diff --git a/rtl/inc/sm3_cfg.v b/rtl/inc/sm3_cfg.v index dc3739d..1e36e93 100644 --- a/rtl/inc/sm3_cfg.v +++ b/rtl/inc/sm3_cfg.v @@ -82,4 +82,8 @@ //定义是否使用 C 语言参考模型(DPI) //define using C reference model or not -//`define C_MODEL_ENABLE \ No newline at end of file +`define C_MODEL_ENABLE + +//定义是否 dump 波形 +//define dump wave in VCD or not +//`define VCD_DUMP_ENABLE \ No newline at end of file diff --git a/rtl/sm3_core_top.sv b/rtl/sm3_core_top.sv index a1dca8a..936514f 100644 --- a/rtl/sm3_core_top.sv +++ b/rtl/sm3_core_top.sv @@ -16,13 +16,38 @@ // Revision 0.01 - File Created ////////////////////////////////////////////////////////////////////////////////// module sm3_core_top ( +`ifdef EPICSIM + input clk, + input rst_n, + input [`INPT_DW1:0] msg_inpt_d, + input [`INPT_BYTE_DW1:0] msg_inpt_vld_byte, + input msg_inpt_vld, + input msg_inpt_lst, + + output msg_inpt_rdy, + + output[255:0] cmprss_otpt_res, + output cmprss_otpt_vld +`else sm3_if.TOP top +`endif ); //interface sm3_if int_if(); sm3_pad_core U_sm3_pad_core( +`ifdef EPICSIM + .clk (clk ), + .rst_n (rst_n ), + + .msg_inpt_d_i (msg_inpt_d ), + .msg_inpt_vld_byte_i (msg_inpt_vld_byte ), + .msg_inpt_vld_i (msg_inpt_vld ), + .msg_inpt_lst_i (msg_inpt_lst ), + + .msg_inpt_rdy_o (msg_inpt_rdy ), +`else .clk (top.clk ), .rst_n (top.rst_n ), @@ -31,9 +56,9 @@ sm3_pad_core U_sm3_pad_core( .msg_inpt_vld_i (top.msg_inpt_vld ), .msg_inpt_lst_i (top.msg_inpt_lst ), - .pad_otpt_ena_i (int_if.pad_otpt_ena ), - .msg_inpt_rdy_o (top.msg_inpt_rdy ), +`endif + .pad_otpt_ena_i (int_if.pad_otpt_ena ), .pad_otpt_d_o (int_if.pad_otpt_d ), .pad_otpt_lst_o (int_if.pad_otpt_lst ), @@ -41,8 +66,14 @@ sm3_pad_core U_sm3_pad_core( ); sm3_expnd_core U_sm3_expnd_core( - .clk (top.clk ), - .rst_n (top.rst_n ), + +`ifdef EPICSIM + .clk (clk ), + .rst_n (rst_n ), +`else + .clk (top.clk ), + .rst_n (top.rst_n ), +`endif .pad_inpt_d_i ( int_if.pad_otpt_d ), .pad_inpt_vld_i ( int_if.pad_otpt_vld ), @@ -56,16 +87,26 @@ sm3_expnd_core U_sm3_expnd_core( ); sm3_cmprss_core U_sm3_cmprss_core( - .clk (top.clk ), - .rst_n (top.rst_n ), +`ifdef EPICSIM + .clk (clk ), + .rst_n (rst_n ), +`else + .clk (top.clk ), + .rst_n (top.rst_n ), +`endif .expnd_inpt_wj_i ( int_if.expnd_otpt_wj ), .expnd_inpt_wjj_i ( int_if.expnd_otpt_wjj ), .expnd_inpt_lst_i ( int_if.expnd_otpt_lst ), .expnd_inpt_vld_i ( int_if.expnd_otpt_vld ), +`ifdef EPICSIM + .cmprss_otpt_res_o ( cmprss_otpt_res ), + .cmprss_otpt_vld_o ( cmprss_otpt_vld ) +`else .cmprss_otpt_res_o ( top.cmprss_otpt_res ), .cmprss_otpt_vld_o ( top.cmprss_otpt_vld ) +`endif ); endmodule \ No newline at end of file diff --git a/sim/run/run_sim.bat b/sim/run/run_sim.bat index d5fd0a5..d866d8c 100644 --- a/sim/run/run_sim.bat +++ b/sim/run/run_sim.bat @@ -24,7 +24,12 @@ set bin_path=%bin_path%/win64 REM set bin_path=C:\modeltech64_10.5\win64 REM call %bin_path%/vsim -do "do ../script/run_sm3_expnd_tb.do" -l run_sim.log REM call %bin_path%/vsim -do "do ../script/run_sm3_cmprss_tb.do" -l run_sim.log -call %bin_path%/vsim -do "do ../script/run_sm3_core_top_tb_wth_cmodel.do" -l run_sim.log + +REM command line mode +REM call %bin_path%/vsim -c -do "do ../script/run_sm3_core_top_tb_wth_cmodel.do" -l run_sim.log + +REM GUI mode +call %bin_path%/vsim -c -do "do ../script/run_sm3_core_top_tb_wth_cmodel.do" -l run_sim.log if "%errorlevel%"=="1" goto END if "%errorlevel%"=="0" goto SUCCESS diff --git a/sim/script/epicsim_sm3_core_top_tb.sh b/sim/run_epicsim/epicsim_sm3_core_top_tb.sh similarity index 52% rename from sim/script/epicsim_sm3_core_top_tb.sh rename to sim/run_epicsim/epicsim_sm3_core_top_tb.sh index f596603..a8a80fa 100644 --- a/sim/script/epicsim_sm3_core_top_tb.sh +++ b/sim/run_epicsim/epicsim_sm3_core_top_tb.sh @@ -2,4 +2,5 @@ #@ljgibbs / lf_gibbs@163.com #usage: script for running tb_sm3_core_top.sv with EpicSim, a opensource simulator -epicsim -g2005-sv ../tb/tb_sm3_core_top.sv -I ../../rtl/inc/ -L ../../rtl/ +epicsim -g2005-sv -I ../../rtl/inc/ -l ../../sim/tb/tb_sm3_core_top.sv ../../rtl/* ../../rtl/if/sm3_if.sv -s tb_sm3_core_top + diff --git a/sim/tb/tb_sm3_core_top.sv b/sim/tb/tb_sm3_core_top.sv index d064b82..33ef043 100644 --- a/sim/tb/tb_sm3_core_top.sv +++ b/sim/tb/tb_sm3_core_top.sv @@ -16,8 +16,7 @@ // Revision 0.03 - Pass random test with c model (64bit) // Revision 0.03 - Add more macro control ////////////////////////////////////////////////////////////////////////////////// -module tb_sm3_core_top ( -); +module tb_sm3_core_top; `ifdef SM3_INPT_DW_32 localparam [1:0] INPT_WORD_NUM = 2'd1; @@ -46,7 +45,19 @@ sm3_if sm3if(); //sm3_core_top sm3_core_top U_sm3_core_top( +`ifdef EPICSIM + .clk (sm3if.clk ), + .rst_n (sm3if.rst_n ), + .msg_inpt_d (sm3if.msg_inpt_d ), + .msg_inpt_vld_byte (sm3if.msg_inpt_vld_byte), + .msg_inpt_vld (sm3if.msg_inpt_vld ), + .msg_inpt_lst (sm3if.msg_inpt_lst ), + .msg_inpt_rdy (sm3if.msg_inpt_rdy ), + .cmprss_otpt_res (sm3if.cmprss_otpt_res ), + .cmprss_otpt_vld (sm3if.cmprss_otpt_vld ) +`else sm3if +`endif ); initial begin @@ -60,6 +71,22 @@ initial begin #100; sm3if.rst_n =1; + `ifdef SM3_INPT_DW_32 + $display("LOG: run SM3 example under 32bit mode."); + `elsif SM3_INPT_DW_64 + $display("LOG: run SM3 example under 64bit mode."); + `endif + + `ifdef C_MODEL_ENABLE + $display("LOG: C reference model enable."); + `endif + + `ifdef VCD_DUMP_ENABLE + $display("LOG: vcd wave dump enable."); + $dumpfile("../run_epicsim/sm3_example.vcd"); + $dumpvars(1, tb_sm3_core_top.U_sm3_core_top); + `endif + while (1) begin //complete random //sm3_inpt_byte_num = $urandom % (61'h1fff_ffff_ffff_ffff) + 1; @@ -76,7 +103,11 @@ initial begin `ifdef C_MODEL_ENABLE task_rndm_inpt_cmpr_cmodel(sm3_inpt_byte_num); `else - task_pad_inpt_gntr_exmpl0_32(); + `ifdef SM3_INPT_DW_32 + task_pad_inpt_gntr_exmpl0_32(); + `elsif SM3_INPT_DW_64 + $display("ERR: example must be run under 32bit mode!"); + `endif `endif @(posedge sm3if.clk); end @@ -200,7 +231,7 @@ endtask //automatic `endif //产生填充模块输入，采用示例输入 'abc' 32bit 输入 -task automatic task_pad_inpt_gntr_exmpl0_32(); +task automatic task_pad_inpt_gntr_exmpl0_32; sm3if.msg_inpt_vld = 1'b1; @@ -215,7 +246,7 @@ task automatic task_pad_inpt_gntr_exmpl0_32(); endtask //automatic //产生填充模块输入，采用示例输入 512bit 重复的 'abcd' 32bit 输入 -task automatic task_pad_inpt_gntr_exmpl1_32(); +task automatic task_pad_inpt_gntr_exmpl1_32; sm3if.msg_inpt_vld = 1'b1; sm3if.msg_inpt_d = 32'h6162_6364; @@ -232,6 +263,7 @@ task automatic task_pad_inpt_gntr_exmpl1_32(); endtask //automatic //32bit 生成最后一个周期数据 +`ifdef C_MODEL_ENABLE `ifdef SM3_INPT_DW_32 function automatic void lst_data_gntr_32( ref logic [31:0] lst_data, @@ -279,7 +311,7 @@ function automatic void lst_data_gntr_64( : rndm_data; endfunction -`endif - +`endif// SM3_INPT_DW_32/64 +`endif//C_MODEL_ENABLE endmodule \ No newline at end of file