FPGA/SM3_core
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对原有的接口信号做了修改

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lf 2020-07-26 23:17:54 +08:00
parent 8dfbfe5370
commit a17b1ca8f5
3 changed files with 26 additions and 26 deletions
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18
rtl/wrppr/sm3_pad_core_wrapper.sv
View File

@ -21,18 +21,18 @@ sm3_pad_core U_sm3_pad_core(
.clk (sm3if.clk ), .clk (sm3if.clk ),
.rst_n (sm3if.rst_n ), .rst_n (sm3if.rst_n ),
.msg_inpt_d_i (sm3if.msg_inpt_d_i ), .msg_inpt_d_i (sm3if.msg_inpt_d ),
.msg_inpt_vld_byte_i (sm3if.msg_inpt_vld_byte_i ), .msg_inpt_vld_byte_i (sm3if.msg_inpt_vld_byte ),
.msg_inpt_vld_i (sm3if.msg_inpt_vld_i ), .msg_inpt_vld_i (sm3if.msg_inpt_vld ),
.msg_inpt_lst_i (sm3if.msg_inpt_lst_i ), .msg_inpt_lst_i (sm3if.msg_inpt_lst ),
.pad_otpt_ena_i (sm3if.pad_otpt_ena_i ), .pad_otpt_ena_i (sm3if.pad_otpt_ena ),
.msg_inpt_rdy_o (sm3if.msg_inpt_rdy_o ), .msg_inpt_rdy_o (sm3if.msg_inpt_rdy ),
.pad_otpt_d_o (sm3if.pad_otpt_d_o ), .pad_otpt_d_o (sm3if.pad_otpt_d ),
.pad_otpt_lst_o (sm3if.pad_otpt_lst_o ), .pad_otpt_lst_o (sm3if.pad_otpt_lst ),
.pad_otpt_vld_o (sm3if.pad_otpt_vld_o ) .pad_otpt_vld_o (sm3if.pad_otpt_vld )
); );
endmodule endmodule

8
tb/sm3_pad_mntr.sv
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@ -35,11 +35,11 @@ always @(posedge sm3if.clk or negedge sm3if.rst_n) begin
sm3_pad_reg_cmpr <= 1'b0; sm3_pad_reg_cmpr <= 1'b0;
sm3_pad_reg_init <= 1'b0; sm3_pad_reg_init <= 1'b0;
end else begin end else begin
sm3_pad_reg_cmpr <= sm3if.pad_otpt_lst_o; sm3_pad_reg_cmpr <= sm3if.pad_otpt_lst;
sm3_pad_reg_init <= sm3_pad_reg_cmpr; sm3_pad_reg_init <= sm3_pad_reg_cmpr;
end end
end end
assign sm3_pad_reg_shft = sm3if.pad_otpt_vld_o; assign sm3_pad_reg_shft = sm3if.pad_otpt_vld;
//shift reg pad data //shift reg pad data
always @(posedge sm3if.clk or negedge sm3if.rst_n) begin always @(posedge sm3if.clk or negedge sm3if.rst_n) begin
@ -47,9 +47,9 @@ always @(posedge sm3if.clk or negedge sm3if.rst_n) begin
sm3_pad_lst_blk_reg <= 512'b0; sm3_pad_lst_blk_reg <= 512'b0;
end else if(sm3_pad_reg_shft)begin end else if(sm3_pad_reg_shft)begin
`ifdef SM3_INPT_DW_32 `ifdef SM3_INPT_DW_32
sm3_pad_lst_blk_reg <= {sm3_pad_lst_blk_reg[(511-32):0],sm3if.pad_otpt_d_o}; sm3_pad_lst_blk_reg <= {sm3_pad_lst_blk_reg[(511-32):0],sm3if.pad_otpt_d};
`elsif SM3_INPT_DW_64 `elsif SM3_INPT_DW_64
sm3_pad_lst_blk_reg <= {sm3_pad_lst_blk_reg[(511-64):0],sm3if.pad_otpt_d_o}; sm3_pad_lst_blk_reg <= {sm3_pad_lst_blk_reg[(511-64):0],sm3if.pad_otpt_d};
`endif `endif
end else if(sm3_pad_reg_init)begin end else if(sm3_pad_reg_init)begin
sm3_pad_lst_blk_reg <= 512'b0; sm3_pad_lst_blk_reg <= 512'b0;

26
tb/tb_sm3_pad_top.sv
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@ -47,11 +47,11 @@ sm3_pad_mntr U_sm3_pad_mntr(
initial begin initial begin
sm3if.clk = 0; sm3if.clk = 0;
sm3if.rst_n = 0; sm3if.rst_n = 0;
sm3if.msg_inpt_d_i = DATA_INIT_PTTRN; sm3if.msg_inpt_d = DATA_INIT_PTTRN;
sm3if.msg_inpt_vld_byte_i = 0; sm3if.msg_inpt_vld_byte = 0;
sm3if.msg_inpt_vld_i = 0; sm3if.msg_inpt_vld = 0;
sm3if.msg_inpt_lst_i = 0; sm3if.msg_inpt_lst = 0;
sm3if.pad_otpt_ena_i = 1;//置高填充模块输出使能 sm3if.pad_otpt_ena = 1;//置高填充模块输出使能
#100; #100;
sm3if.rst_n =1; sm3if.rst_n =1;
@ -66,7 +66,7 @@ initial begin
task_pad_inpt_gntr(sm3_inpt_byte_num); task_pad_inpt_gntr(sm3_inpt_byte_num);
//生成 golden pattern //生成 golden pattern
golden_pttrn_gntr(gldn_pttrn,sm3_inpt_byte_num); golden_pttrn_gntr(gldn_pttrn,sm3_inpt_byte_num);
wait(sm3if.pad_otpt_lst_o); wait(sm3if.pad_otpt_lst);
@(posedge sm3if.clk); @(posedge sm3if.clk);
end end
@ -94,23 +94,23 @@ task automatic task_pad_inpt_gntr(
//前 N-1 个周期的数据 //前 N-1 个周期的数据
sm3if.msg_inpt_vld_i = 1'b1; sm3if.msg_inpt_vld = 1'b1;
repeat(data_inpt_clk_num - 1'b1)begin repeat(data_inpt_clk_num - 1'b1)begin
@(posedge sm3if.clk); @(posedge sm3if.clk);
end end
sm3if.msg_inpt_lst_i = 1'b1; sm3if.msg_inpt_lst = 1'b1;
//准备最后一个周期的数据 //准备最后一个周期的数据
`ifdef SM3_INPT_DW_32 `ifdef SM3_INPT_DW_32
lst_data_gntr_32(sm3if.msg_inpt_d_i,sm3if.msg_inpt_vld_byte_i,unalign_byte_num); lst_data_gntr_32(sm3if.msg_inpt_d,sm3if.msg_inpt_vld_byte,unalign_byte_num);
`elsif SM3_INPT_DW_64 `elsif SM3_INPT_DW_64
lst_data_gntr_64(sm3if.msg_inpt_d_i,sm3if.msg_inpt_vld_byte_i,unalign_byte_num); lst_data_gntr_64(sm3if.msg_inpt_d,sm3if.msg_inpt_vld_byte,unalign_byte_num);
`endif `endif
@(posedge sm3if.clk); @(posedge sm3if.clk);
sm3if.msg_inpt_vld_i = 1'b0; sm3if.msg_inpt_vld = 1'b0;
sm3if.msg_inpt_lst_i = 1'b0; sm3if.msg_inpt_lst = 1'b0;
sm3if.msg_inpt_d_i = DATA_INIT_PTTRN; sm3if.msg_inpt_d = DATA_INIT_PTTRN;
endtask //automatic endtask //automatic