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https://github.com/ljgibbslf/SM3_core.git
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53 lines
1.7 KiB
Systemverilog
53 lines
1.7 KiB
Systemverilog
`timescale 1ns / 1ps
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// `include "../inc/sm3_cfg"
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`include "sm3_cfg.v"
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//////////////////////////////////////////////////////////////////////////////////
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// Author: ljgibbs / lf_gibbs@163.com
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// Create Date: 2020/07/22
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// Design Name: sm3
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// Module Name: sm3_if
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// Description:
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// SM3 总线定义
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// 分为 pad/expnd/cmprss/monitor 类型
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// Dependencies:
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// inc/sm3_cfg.v
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// Revision:
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// Revision 0.01 - File Created
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//////////////////////////////////////////////////////////////////////////////////
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interface sm3_if;
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logic clk;
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logic rst_n;
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logic [`INPT_DW1:0] msg_inpt_d;
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logic [`INPT_BYTE_DW1:0] msg_inpt_vld_byte;
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logic msg_inpt_vld;
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logic msg_inpt_lst;
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logic msg_inpt_rdy;
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logic pad_otpt_ena;
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logic [`INPT_DW1:0] pad_otpt_d;
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logic pad_otpt_lst;
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logic pad_otpt_vld;
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logic expnd_otpt_ena;
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logic [`INPT_DW1:0] expnd_otpt_wj;
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logic [`INPT_DW1:0] expnd_otpt_wjj;
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logic expnd_otpt_lst;
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logic expnd_otpt_vld;
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modport PAD (
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input clk,rst_n,msg_inpt_d,msg_inpt_vld_byte,msg_inpt_vld,msg_inpt_lst,pad_otpt_ena,
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output msg_inpt_rdy,pad_otpt_d,pad_otpt_lst,pad_otpt_vld
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);
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modport MONITOR (
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input clk,rst_n,msg_inpt_d,msg_inpt_vld_byte,msg_inpt_vld,msg_inpt_lst,pad_otpt_ena,
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msg_inpt_rdy,pad_otpt_d,pad_otpt_lst,pad_otpt_vld
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);
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modport EXPND (
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input clk,rst_n,expnd_otpt_ena,pad_otpt_d,pad_otpt_lst,pad_otpt_vld,
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output expnd_otpt_wj,expnd_otpt_wjj,expnd_otpt_lst,expnd_otpt_vld,pad_otpt_ena
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);
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endinterface //sm3_if
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