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https://github.com/ljgibbslf/SM3_core.git
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326 lines
14 KiB
Verilog
326 lines
14 KiB
Verilog
`timescale 1ns / 1ps
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// `include "./inc/sm3_cfg.v"
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`include "sm3_cfg.v"
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//////////////////////////////////////////////////////////////////////////////////
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// Author: ljgibbs / lf_gibbs@163.com
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// Create Date: 2020/07/19
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// Design Name: sm3
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// Module Name: sm3_pad_core
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// Description:
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// SM3 填充模块-SM3 填充核心单元
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// 输入位宽:INPT_DW1 定义,支持32/64
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// 输出位宽:与输入位宽一致
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// Dependencies:
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// inc/sm3_cfg.v
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// Revision:
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// Revision 0.01 - File Created
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//////////////////////////////////////////////////////////////////////////////////
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module sm3_pad_core (
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input clk,
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input rst_n,
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input [`INPT_DW1:0] msg_inpt_d_i,
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input [`INPT_BYTE_DW1:0] msg_inpt_vld_byte_i,
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input msg_inpt_vld_i,
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input msg_inpt_lst_i,
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input pad_otpt_ena_i,
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output msg_inpt_rdy_o,
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output [`INPT_DW1:0] pad_otpt_d_o,
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output pad_otpt_lst_o,
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output pad_otpt_vld_o
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);
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localparam [15:0] PAD_BLK_WD_NUM = 16;
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localparam [15:0] PAD_BLK_BIT_LEN_WD_NUM = 2;
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localparam [15:0] PAD_BLK_WD_NUM_INIT = PAD_BLK_WD_NUM - PAD_BLK_BIT_LEN_WD_NUM;
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localparam [ 3:0] PAD_BLK_WD_NUM_WTHT_LEN = PAD_BLK_WD_NUM - PAD_BLK_BIT_LEN_WD_NUM;
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//每时钟输入的数据字数量 32bit位宽:1 64bit位宽:2
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`ifdef SM3_INPT_DW_32
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localparam [1:0] INPT_WORD_NUM = 2'd1;
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`elsif SM3_INPT_DW_64
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localparam [1:0] INPT_WORD_NUM = 2'd2;
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`endif
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//最后一个数据的填充图样
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`ifdef SM3_INPT_DW_32
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reg [31:0] lst_data_pad_mask;
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`elsif SM3_INPT_DW_64
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reg [63:0] lst_data_pad_mask;
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`endif
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//对输入数据打拍 beat inpt signals
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reg [`INPT_DW1:0] msg_inpt_d_r1;
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reg [`INPT_BYTE_DW1:0] msg_inpt_vld_byte_r1;
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reg msg_inpt_vld_r1;
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reg msg_inpt_lst_r1;
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//输入字数统计 count inpt words(32bit)
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reg [15:0] inpt_wd_cntr;
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wire inpt_wd_cntr_add;
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wire inpt_wd_cntr_clr;
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//输入字节数统计 count inpt byte
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wire[60:0] inpt_byte_cntr;
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//填充字数统计 count padded words
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reg [4:0] pad_00_wd_cntr;
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wire pad_00_wd_cntr_inpt_updt; //随数据输入递减 dec with data inpt
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wire pad_00_wd_cntr_pad_updt; //随数据填充递减 dec with pad data
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wire pad_00_wd_cntr_rld; //对于新消息,装填计数器 reload cntr for new msg
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//输入比特长度 count inpt bit length
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wire [63:0] inpt_bit_cntr;
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//填充后数据输出使能
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wire pad_otpt_ena;
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//统计最后一个数据的有效字节数 cnt vld byte of the last inpt data
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reg [3:0] inpt_vld_byte_cnt;
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reg [3:0] inpt_vld_byte_cnt_lat;
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wire inpt_vld_byte_cmplt;
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integer i;
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//流程状态机
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`define STT_W 10
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`define STT_W1 `STT_W - 1
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reg [`STT_W1:0] state;
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reg [`STT_W1:0] nxt_state;
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localparam IDLE = `STT_W'h1;
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localparam INPT_DATA = `STT_W'h2;
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localparam INPT_PAD_LST_DATA = `STT_W'h4;
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localparam PAD_10_DATA = `STT_W'h8;
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localparam PAD_00_DATA = `STT_W'h10;
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localparam PAD_LEN_H = `STT_W'h20;
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localparam PAD_LEN_L = `STT_W'h40;
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localparam ADD_BLK_PAD_00 = `STT_W'h80;
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localparam PAD_00_WAT_NEW_BLK = `STT_W'h100;
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localparam PAD_10_WAT_NEW_BLK = `STT_W'h200;
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//对输入数据打拍 beat inpt signals
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always @(posedge clk or negedge rst_n) begin
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if(~rst_n) begin
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msg_inpt_d_r1 <= `INPT_DW'b0;
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msg_inpt_vld_byte_r1 <= 'b0;
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msg_inpt_vld_r1 <= 1'b0;
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msg_inpt_lst_r1 <= 1'b0;
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end else begin
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msg_inpt_d_r1 <= msg_inpt_d_i;
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msg_inpt_vld_byte_r1 <= msg_inpt_vld_byte_i;
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msg_inpt_vld_r1 <= msg_inpt_vld_i;
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msg_inpt_lst_r1 <= msg_inpt_lst_i;
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end
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end
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//生成最后一个数据的填充图样
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always @(*) begin
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`ifdef SM3_INPT_DW_32
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case (inpt_vld_byte_cnt)
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4'd0: lst_data_pad_mask = 32'h8000_0000;
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4'd1: lst_data_pad_mask = 32'h0080_0000;
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4'd2: lst_data_pad_mask = 32'h0000_8000;
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4'd3: lst_data_pad_mask = 32'h0000_0080;
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4'd4: lst_data_pad_mask = 32'h0000_0000;
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default: lst_data_pad_mask = 32'h8000_0000;
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endcase
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`elsif SM3_INPT_DW_64
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case (inpt_vld_byte_cnt)
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4'd0: lst_data_pad_mask = 64'h8000_0000_0000_0000;
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4'd1: lst_data_pad_mask = 64'h0080_0000_0000_0000;
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4'd2: lst_data_pad_mask = 64'h0000_8000_0000_0000;
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4'd3: lst_data_pad_mask = 64'h0000_0080_0000_0000;
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4'd4: lst_data_pad_mask = 64'h0000_0000_8000_0000;
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4'd5: lst_data_pad_mask = 64'h0000_0000_0080_0000;
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4'd6: lst_data_pad_mask = 64'h0000_0000_0000_8000;
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4'd7: lst_data_pad_mask = 64'h0000_0000_0000_0080;
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4'd8: lst_data_pad_mask = 64'h0000_0000_0000_0000;
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default: lst_data_pad_mask = 64'h8000_0000_0000_0000;
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endcase
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`endif
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end
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//统计最后一个数据的有效字节数
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always @(*) begin
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inpt_vld_byte_cnt = 4'b0;
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for(i = 0;i <= `INPT_BYTE_DW1;i=i+1) begin
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inpt_vld_byte_cnt = inpt_vld_byte_cnt + msg_inpt_vld_byte_r1[i];
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end
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end
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assign inpt_vld_byte_cmplt = inpt_vld_byte_cnt == 4 * INPT_WORD_NUM;
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//在last信号,锁存 inpt_vld_byte_cnt
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always @(posedge clk or negedge rst_n) begin
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if(~rst_n) begin
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inpt_vld_byte_cnt_lat <= 4'd0;
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end
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else if(msg_inpt_lst_r1)begin
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inpt_vld_byte_cnt_lat <= inpt_vld_byte_cnt;
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end
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end
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//输入字数统计
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always @(posedge clk or negedge rst_n) begin
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if(~rst_n) begin
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inpt_wd_cntr <= 16'b0;
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end else if(inpt_wd_cntr_add)begin
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inpt_wd_cntr <= inpt_wd_cntr + INPT_WORD_NUM;
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end else if(inpt_wd_cntr_clr)begin
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inpt_wd_cntr <= 16'b0;
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end
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end
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assign inpt_wd_cntr_add = msg_inpt_vld_r1;
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assign inpt_wd_cntr_clr = pad_otpt_lst_o;
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assign inpt_byte_cntr = {inpt_wd_cntr,2'd0} + inpt_vld_byte_cnt_lat - {INPT_WORD_NUM,2'd0};
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assign inpt_bit_cntr = {inpt_byte_cntr,3'd0};
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//填充字数统计
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always @(posedge clk or negedge rst_n) begin
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if(~rst_n) begin
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pad_00_wd_cntr <= PAD_BLK_WD_NUM_INIT;//16-2=14
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end else if(pad_00_wd_cntr_inpt_updt)begin
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pad_00_wd_cntr <= pad_00_wd_cntr == INPT_WORD_NUM
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? PAD_BLK_WD_NUM
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: pad_00_wd_cntr - INPT_WORD_NUM;
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end else if(pad_00_wd_cntr_rld)begin
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pad_00_wd_cntr <= PAD_BLK_WD_NUM_INIT;
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end else if(pad_00_wd_cntr_pad_updt)begin
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pad_00_wd_cntr <= pad_00_wd_cntr - INPT_WORD_NUM;
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end
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end
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assign pad_00_wd_cntr_inpt_updt = msg_inpt_vld_r1;
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assign pad_00_wd_cntr_pad_updt = state == PAD_10_DATA || state == PAD_00_DATA || state == ADD_BLK_PAD_00;
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assign pad_00_wd_cntr_rld = pad_otpt_lst_o;
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//实现流程状态机
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always @(*) begin
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case (state)
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IDLE: begin
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if(msg_inpt_vld_i && ~msg_inpt_lst_i)
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nxt_state = INPT_DATA;
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else if(msg_inpt_lst_i)//fix 数据周期为1的情况
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nxt_state = INPT_PAD_LST_DATA;
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else
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nxt_state = IDLE;
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end
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INPT_DATA: begin //直接输出输入数据,无需填充
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if(msg_inpt_lst_i)
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nxt_state = INPT_PAD_LST_DATA;
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else
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nxt_state = INPT_DATA;
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end
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INPT_PAD_LST_DATA: begin//根据最后一个输入数据的情况,确定填充策略
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if(inpt_vld_byte_cmplt) begin
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// if(inpt_wd_cntr[3:0] == 4'd0 && ~(inpt_wd_cntr == 16'd0))begin
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if(inpt_wd_cntr[3:0] == PAD_BLK_WD_NUM - INPT_WORD_NUM)begin
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nxt_state = PAD_10_WAT_NEW_BLK;//填充以'1'为首的新块
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end else begin//本块中填1
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nxt_state = PAD_10_DATA;
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end
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end
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else if(inpt_wd_cntr[3:0] == PAD_BLK_WD_NUM_WTHT_LEN - INPT_WORD_NUM)//14 - 1/2
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nxt_state = PAD_LEN_H;
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else if(inpt_wd_cntr[3:0] < PAD_BLK_WD_NUM_WTHT_LEN - INPT_WORD_NUM)
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nxt_state = PAD_00_DATA;
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else if(inpt_wd_cntr[3:0] > PAD_BLK_WD_NUM_WTHT_LEN - INPT_WORD_NUM)
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`ifdef SM3_INPT_DW_32
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if(inpt_wd_cntr[3:0] == PAD_BLK_WD_NUM_WTHT_LEN)
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nxt_state = ADD_BLK_PAD_00;//(32位专用)为当前块填充最后一个全0双字
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else
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nxt_state = PAD_00_WAT_NEW_BLK;
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`elsif SM3_INPT_DW_64
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nxt_state = PAD_00_WAT_NEW_BLK;
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`endif
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end
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PAD_10_DATA: begin//填充由1个1和若干个0组成的数据
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if(inpt_wd_cntr[3:0] < PAD_BLK_WD_NUM_WTHT_LEN - INPT_WORD_NUM)//14-2(64b)
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nxt_state = PAD_00_DATA;//直接填0
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else if(inpt_wd_cntr[3:0] == PAD_BLK_WD_NUM_WTHT_LEN - INPT_WORD_NUM)
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nxt_state = PAD_LEN_H;//填充长度
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else begin //>PAD_BLK_WD_NUM_WTHT_LEN - INPT_WORD_NUM
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`ifdef SM3_INPT_DW_32
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if(inpt_wd_cntr[3:0] == PAD_BLK_WD_NUM_WTHT_LEN)
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nxt_state = ADD_BLK_PAD_00;//(32位专用)为当前块填充最后一个全0双字
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else
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nxt_state = PAD_00_WAT_NEW_BLK;
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`elsif SM3_INPT_DW_64
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nxt_state = PAD_00_WAT_NEW_BLK;
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`endif
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end
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end
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ADD_BLK_PAD_00:begin//在新增的填充块之前补一个0字(32位专用)
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nxt_state = PAD_00_WAT_NEW_BLK;
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end
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PAD_00_WAT_NEW_BLK:
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if(~pad_otpt_ena_i) //等待上一块处理完毕后 开始新的一块输出
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nxt_state = PAD_00_WAT_NEW_BLK;
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else
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nxt_state = PAD_00_DATA;
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PAD_10_WAT_NEW_BLK: //与 PAD_00_WAT_NEW_BLK 状态的区别在于,新块跳转 PAD_10_DATA 添加 10
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if(~pad_otpt_ena_i)
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nxt_state = PAD_10_WAT_NEW_BLK;
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else
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nxt_state = PAD_10_DATA;
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PAD_00_DATA: //填充全 0 数据
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if(pad_00_wd_cntr == INPT_WORD_NUM)
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nxt_state = PAD_LEN_H;
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else
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nxt_state = PAD_00_DATA;
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PAD_LEN_H: //填充比特长度的高32位/填充整个比特长度
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`ifdef SM3_INPT_DW_32
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nxt_state = PAD_LEN_L;
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`elsif SM3_INPT_DW_64
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nxt_state = IDLE;
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`endif
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PAD_LEN_L:
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nxt_state = IDLE;
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default:
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nxt_state = IDLE;
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endcase
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end
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always @(posedge clk or negedge rst_n) begin
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if(~rst_n)
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state <= `STT_W'b1;
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else begin
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state <= nxt_state;
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end
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end
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assign pad_otpt_ena = state == PAD_10_DATA
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|| state == PAD_00_DATA
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|| state == PAD_LEN_H
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|| state == PAD_LEN_L
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|| state == ADD_BLK_PAD_00 ;
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//输出控制
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`ifdef SM3_INPT_DW_32
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assign pad_otpt_d_o = state == PAD_10_DATA ? 32'h8000_0000:
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state == INPT_PAD_LST_DATA? msg_inpt_d_r1 | lst_data_pad_mask:
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state == PAD_00_DATA || state == ADD_BLK_PAD_00? 32'h0:
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state == PAD_LEN_H ? inpt_bit_cntr[63-:32]:
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state == PAD_LEN_L ? inpt_bit_cntr[31-:32]:
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msg_inpt_d_r1;
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assign pad_otpt_lst_o = state == PAD_LEN_L;
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`elsif SM3_INPT_DW_64
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assign pad_otpt_d_o = state == PAD_10_DATA ? 64'h8000_0000_0000_0000:
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state == INPT_PAD_LST_DATA? msg_inpt_d_r1 | lst_data_pad_mask:
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state == PAD_00_DATA || state == ADD_BLK_PAD_00? 64'h0:
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state == PAD_LEN_H ? inpt_bit_cntr:
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msg_inpt_d_r1;
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assign pad_otpt_lst_o = state == PAD_LEN_H;
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`endif
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assign pad_otpt_vld_o = msg_inpt_vld_r1 || pad_otpt_ena;
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assign msg_inpt_rdy_o = pad_otpt_ena_i && (state == IDLE || state == INPT_DATA);
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endmodule |