USTC-RVSoC/.gitignore

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2019-02-11 17:23:53 +08:00
*.bak
*.qws
*.rpt
*.done
*.smsg
*.summary
*.pin
*.dat
*.dbs
*.vhd
*.prw
*.psm
*.mti
**/db/
**/incremental_db/
**/simulation/
*.suo
**/bin/Debug
**/bin/Release
**/obj/Debug
**/obj/Release
**/riscv32-elf-tools-windows/*.bin
**/USTCRVSoC-nexys4.runs
**/USTCRVSoC-nexys4/*.log
2019-03-21 00:14:36 +08:00
**/USTCRVSoC-nexys4.sim
!Nexys4_USTCRVSoC_top.bit
**/software/ASM
**/Quartus/UART_ISP_TEST