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修正readme

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WangXuan95 2019-02-28 13:47:08 +08:00
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3 changed files with 8 additions and 119 deletions
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4
README.md
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@ -83,7 +83,7 @@ TODO
> 1、使用写命令，将指令流写入指令RAM，（指令RAM的地址是00008000~00008fff）
> 2、使用复位命令r00008000，将CPU复位并从指令RAM种BOOT
> 2、使用复位命令r00008000，将CPU复位并从指令RAM中BOOT
### 使用工具：USTCRVSoC-tool （该软件有所改动，文档稍后补充）
@ -98,7 +98,7 @@ TODO
| fibonacci_recursive.S | 递归法计算斐波那契数列第7个数并，用用户UART打印结果 |
| load_store.S | 完成一些内存读写，没有具体表现，为了观察现象，可以使用UART调试器查看内存 |
现在我们尝试让SoC运行一个计算斐波那契数列并UART打印的程序。点击“打开...”按钮，浏览到目录./software/asm-code，打开汇编文件uart_print.S。点击右侧的“汇编”按钮，可以看到右方框里出现了一串16进制数，这就是汇编得到的机器码。然后，选择正确的COM口，点击“烧写”，如果下方状态栏里显示“烧写成功”，则CPU就已经开始运行该机器码了。这时，在右侧的“串口查看”框里选中“16进制显示”，可以看到不断显示出15，这说明CPU正确的计算出斐波那契数列的第七个数是15。
现在我们尝试让SoC运行一个计算斐波那契数列并UART打印的程序。点击“打开...”按钮，浏览到目录./software/asm-code，打开汇编文件 fibonacci_recursive.S。点击右侧的“汇编”按钮，可以看到右方框里出现了一串16进制数，这就是汇编得到的机器码。然后，选择正确的COM口，点击“烧写”，如果下方状态栏里显示“烧写成功”，则CPU就已经开始运行该机器码了。这时，在右侧的“串口查看”框里选中“16进制显示”，可以看到不断显示出15，这说明CPU正确的计算出斐波那契数列的第七个数是0x15，即十进制的21。

7
hardware/Vivado/nexys4/USTCRVSoC-nexys4/USTCRVSoC-nexys4.cache/wt/webtalk_pa.xml
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@ -3,7 +3,7 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pa" timeStamp="Tue Feb 26 19:55:16 2019">
<application name="pa" timeStamp="Tue Feb 26 20:02:21 2019">
<section name="Project Information" visible="false">
<property name="ProjectID" value="802f49394334431ea9abba122e836e9e" type="ProjectID"/>
<property name="ProjectIteration" value="13" type="ProjectIteration"/>
@ -101,6 +101,11 @@ This means code written to parse this file will need to be revisited each subseq
<property name="TaskBanner_CLOSE" value="1" type="GuiHandlerData"/>
<property name="TouchpointSurveyDialog_NO" value="1" type="GuiHandlerData"/>
</item>
<item name="Other">
<property name="GuiMode" value="16" type="GuiMode"/>
<property name="BatchMode" value="0" type="BatchMode"/>
<property name="TclMode" value="15" type="TclMode"/>
</item>
</section>
</application>
</document>

116
hardware/Vivado/nexys4/USTCRVSoC-nexys4/vivado_pid11396.str
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@ -1,116 +0,0 @@
/*
Xilinx Vivado v2017.4 (64-bit) [Major: 2017, Minor: 4]
SW Build: 2086221 on Fri Dec 15 20:55:39 MST 2017
IP Build: 2085800 on Fri Dec 15 22:25:07 MST 2017
Process ID: 11396
License: Customer
Current time: Tue Feb 26 19:48:54 CST 2019
Time zone: China Standard Time (Asia/Shanghai)
OS: Windows 10
OS Version: 10.0
OS Architecture: amd64
Available processors (cores): 12
Screen size: 1536x864
Screen resolution (DPI): 96
Available screens: 2
Available disk space: 107 GB
Default font: family=Dialog,name=Dialog,style=plain,size=12
Java version: 1.8.0_112 64-bit
Java home: C:/Xilinx/Vivado/2017.4/tps/win64/jre
JVM executable location: C:/Xilinx/Vivado/2017.4/tps/win64/jre/bin/java.exe
User name: wgg
User home directory: C:/Users/wgg
User working directory: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4
User country: CN
User language: zh
User locale: zh_CN
RDI_BASEROOT: C:/Xilinx/Vivado
HDI_APPROOT: C:/Xilinx/Vivado/2017.4
RDI_DATADIR: C:/Xilinx/Vivado/2017.4/data
RDI_BINDIR: C:/Xilinx/Vivado/2017.4/bin
Vivado preferences file location: C:/Users/wgg/AppData/Roaming/Xilinx/Vivado/2017.4/vivado.xml
Vivado preferences directory: C:/Users/wgg/AppData/Roaming/Xilinx/Vivado/2017.4/
Vivado layouts directory: C:/Users/wgg/AppData/Roaming/Xilinx/Vivado/2017.4/layouts
PlanAhead jar file location: C:/Xilinx/Vivado/2017.4/lib/classes/planAhead.jar
Vivado log file location: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/vivado.log
Vivado journal file location: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/vivado.jou
Engine tmp dir: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/.Xil/Vivado-11396-DESKTOP-C6I6OAQ
GUI allocated memory: 187 MB
GUI max memory: 3,052 MB
Engine allocated memory: 584 MB
Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
*/
// TclEventType: START_GUI
// Tcl Message: start_gui
// TclEventType: PROJECT_OPEN_DIALOG
// [GUI Memory]: 63 MB (+64093kb) [00:00:05]
// [Engine Memory]: 520 MB (+394111kb) [00:00:05]
// Opening Vivado Project: E:\work-Lab\USTCRVSoC\hardware\Vivado\nexys4\USTCRVSoC-nexys4\USTCRVSoC-nexys4.xpr. Version: Vivado v2017.4
// bs (cj): Open Project : addNotify
// TclEventType: DEBUG_PROBE_SET_CHANGE
// Tcl Message: open_project E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/USTCRVSoC-nexys4.xpr
// TclEventType: MSGMGR_MOVEMSG
// TclEventType: FILE_SET_NEW
// TclEventType: RUN_CURRENT
// TclEventType: PROJECT_NEW
// [GUI Memory]: 73 MB (+6894kb) [00:00:07]
// [Engine Memory]: 581 MB (+36276kb) [00:00:07]
// Tcl Message: open_project E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/USTCRVSoC-nexys4.xpr
// Tcl Message: Scanning sources... Finished scanning sources
// Tcl Message: INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified
// TclEventType: PROJECT_NEW
// [GUI Memory]: 101 MB (+24904kb) [00:00:08]
// [Engine Memory]: 631 MB (+22173kb) [00:00:08]
// [GUI Memory]: 126 MB (+21047kb) [00:00:09]
// [GUI Memory]: 137 MB (+5136kb) [00:00:09]
// [Engine Memory]: 679 MB (+17205kb) [00:00:09]
// Tcl Message: INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2017.4/data/ip'.
// HMemoryUtils.trashcanNow. Engine heap size: 680 MB. GUI used memory: 42 MB. Current time: 2/26/19 7:48:56 PM CST
// Project name: USTCRVSoC-nexys4; location: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4; part: xc7a100tcsg324-1
dismissDialog("Open Project"); // bs (cj)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// [Engine Memory]: 747 MB (+34981kb) [00:00:13]
// Tcl Message: update_compile_order -fileset sources_1
// Elapsed time: 191 seconds
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // aw (f, cj)
selectMenuItem(PAResourceCommand.PACommandNames_RUN_SYNTHESIS, "Run Synthesis"); // ac (cj)
// Run Command: PAResourceCommand.PACommandNames_RUN_SYNTHESIS
// bs (cj): Starting Design Runs : addNotify
// TclEventType: RUN_LAUNCH
// Tcl Message: launch_runs synth_1 -jobs 8
// TclEventType: RUN_MODIFY
// Tcl Message: [Tue Feb 26 19:52:10 2019] Launched synth_1... Run output will be captured here: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/USTCRVSoC-nexys4.runs/synth_1/runme.log
dismissDialog("Starting Design Runs"); // bs (cj)
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking too long to process. Increasing delay to 2000 ms.
// ah (cj): Synthesis Completed: addNotify
// Elapsed time: 185 seconds
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (ah)
// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
// bs (cj): Resetting Runs : addNotify
// TclEventType: RUN_MODIFY
// TclEventType: RUN_RESET
// TclEventType: RUN_MODIFY
// Tcl Message: reset_run impl_1
// bs (cj): Starting Design Runs : addNotify
// TclEventType: RUN_LAUNCH
// TclEventType: RUN_MODIFY
// Tcl Message: launch_runs impl_1 -jobs 8
// Tcl Message: [Tue Feb 26 19:55:16 2019] Launched impl_1... Run output will be captured here: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/USTCRVSoC-nexys4.runs/impl_1/runme.log
dismissDialog("Starting Design Runs"); // bs (cj)
// TclEventType: RUN_STEP_COMPLETED
// TclEventType: RUN_COMPLETED