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chore: 添加modelsim和quartus工程的gitignore

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kdurant_h 2019-04-22 22:02:50 +08:00
parent df43dd1898
commit cac1b99f6e
1 changed files with 71 additions and 28 deletions
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99
.gitignore vendored
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@ -1,28 +1,71 @@
*.bak *.bak
*.qws *.qws
*.rpt *.rpt
*.done *.done
*.smsg *.smsg
*.summary *.summary
*.pin *.pin
*.dat *.dat
*.dbs *.dbs
*.vhd *.vhd
*.prw *.prw
*.psm *.psm
*.mti *.mti
**/db/ **/db/
**/incremental_db/ **/incremental_db/
**/simulation/ **/simulation/
*.suo *.suo
**/bin/Debug **/bin/Debug
**/bin/Release **/bin/Release
**/obj/Debug **/obj/Debug
**/obj/Release **/obj/Release
**/riscv32-elf-tools-windows/*.bin **/riscv32-elf-tools-windows/*.bin
**/USTCRVSoC-nexys4.runs **/USTCRVSoC-nexys4.runs
**/USTCRVSoC-nexys4/*.log **/USTCRVSoC-nexys4/*.log
**/USTCRVSoC-nexys4.sim **/USTCRVSoC-nexys4.sim
!Nexys4_USTCRVSoC_top.bit !Nexys4_USTCRVSoC_top.bit
**/software/ASM **/software/ASM
**/Quartus/UART_ISP_TEST **/Quartus/UART_ISP_TEST
##############quartus###################
db
greybox_tmp
incremental_db
output_files
simulation
*.qws
*.ddb
*.xml
*.csv
*.wlf
*.bak
*.tmp2
*1.v
*.html
*.xml
*.rpt
*.stp
*.echo
*.done
*.smsg
*.summary
*.jdi
*.qdf
*.jic
##############modelsim###################
work
*.mpf
*.mti
*.wlf
*.vstf
wlf*
transcript
virtuals.do
wave.do
*.ini
*.tr
*.ver