mirror of
https://github.com/WangXuan95/USTC-RVSoC.git
synced 2025-01-30 23:02:55 +08:00
35 lines
733 B
ArmAsm
35 lines
733 B
ArmAsm
.org 0x0
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.global _start
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_start:
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lui a0, 0x00010
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ori a0, a0, 0x000
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addi a1, zero, 0xc8
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addi a2, zero, 0x56
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addi a3, zero, 0xa4
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addi a4, zero, 0x12
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sb a1, 0(a0)
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sb a2, 1(a0)
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sb a3, 2(a0)
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sb a4, 3(a0)
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lw t0, 0(a0)
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lb t0, 0(a0)
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lb t0, 1(a0)
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lb t0, 2(a0)
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lb t0, 3(a0)
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lbu t0, 0(a0)
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lbu t0, 1(a0)
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lbu t0, 2(a0)
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lbu t0, 3(a0)
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lh t0, 0(a0)
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lh t0, 2(a0)
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lhu t0, 0(a0)
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lhu t0, 2(a0)
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lui a5, 0x12345
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addi a5, a5, 0x678
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sh a5, 16(a0)
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addi t0, zero, 16
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srli a6, a5, 16
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srl a7, a5, t0
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sh a7, 18(a0)
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here: jal zero,here
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