mirror of
https://github.com/WangXuan95/USTC-RVSoC.git
synced 2025-01-30 23:02:55 +08:00
36 lines
620 B
ArmAsm
36 lines
620 B
ArmAsm
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.org 0x0
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.global _start
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_start:
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main:
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lui a0, 0x00010
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ori t3, zero, 4
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sw t3 , (a0)
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ori t2, zero, 32
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sw t2, 16(a0)
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ori t2, zero, 16
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add t3, a0, t2
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or zero, zero, zero
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or zero, zero, zero
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or zero, zero, zero
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or zero, zero, zero
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or zero, zero, zero
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or zero, zero, zero
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or zero, zero, zero
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lw t3, (t3)
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beq a0, a0, PartationFirstEnd
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add zero, t3, zero
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PartationFirstEnd:
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sw t3 , (a0)
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infinity_loop:
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jal zero, infinity_loop
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