mirror of
https://github.com/WangXuan95/USTC-RVSoC.git
synced 2024-12-24 22:58:56 +08:00
72 lines
782 B
Plaintext
72 lines
782 B
Plaintext
*.bak
|
|
*.qws
|
|
*.rpt
|
|
*.done
|
|
*.smsg
|
|
*.summary
|
|
*.pin
|
|
*.dat
|
|
*.dbs
|
|
*.vhd
|
|
*.prw
|
|
*.psm
|
|
*.mti
|
|
**/db/
|
|
**/incremental_db/
|
|
**/simulation/
|
|
*.suo
|
|
**/bin/Debug
|
|
**/bin/Release
|
|
**/obj/Debug
|
|
**/obj/Release
|
|
**/riscv32-elf-tools-windows/*.bin
|
|
**/USTCRVSoC-nexys4.runs
|
|
**/USTCRVSoC-nexys4/*.log
|
|
**/USTCRVSoC-nexys4.sim
|
|
!Nexys4_USTCRVSoC_top.bit
|
|
**/software/ASM
|
|
**/Quartus/UART_ISP_TEST
|
|
|
|
|
|
##############quartus###################
|
|
db
|
|
greybox_tmp
|
|
incremental_db
|
|
output_files
|
|
simulation
|
|
*.qws
|
|
*.ddb
|
|
*.xml
|
|
*.csv
|
|
*.wlf
|
|
*.bak
|
|
*.tmp2
|
|
*1.v
|
|
*.html
|
|
*.xml
|
|
*.rpt
|
|
*.stp
|
|
*.echo
|
|
*.done
|
|
*.smsg
|
|
*.summary
|
|
*.jdi
|
|
*.qdf
|
|
*.jic
|
|
|
|
|
|
##############modelsim###################
|
|
work
|
|
*.mpf
|
|
*.mti
|
|
*.wlf
|
|
*.vstf
|
|
wlf*
|
|
transcript
|
|
virtuals.do
|
|
wave.do
|
|
*.ini
|
|
*.tr
|
|
*.ver
|
|
|