mirror of
https://github.com/WangXuan95/USTC-RVSoC.git
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117 lines
5.3 KiB
Plaintext
117 lines
5.3 KiB
Plaintext
/*
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Xilinx Vivado v2017.4 (64-bit) [Major: 2017, Minor: 4]
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SW Build: 2086221 on Fri Dec 15 20:55:39 MST 2017
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IP Build: 2085800 on Fri Dec 15 22:25:07 MST 2017
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Process ID: 11396
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License: Customer
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Current time: Tue Feb 26 19:48:54 CST 2019
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Time zone: China Standard Time (Asia/Shanghai)
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OS: Windows 10
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OS Version: 10.0
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OS Architecture: amd64
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Available processors (cores): 12
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Screen size: 1536x864
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Screen resolution (DPI): 96
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Available screens: 2
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Available disk space: 107 GB
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Default font: family=Dialog,name=Dialog,style=plain,size=12
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Java version: 1.8.0_112 64-bit
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Java home: C:/Xilinx/Vivado/2017.4/tps/win64/jre
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JVM executable location: C:/Xilinx/Vivado/2017.4/tps/win64/jre/bin/java.exe
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User name: wgg
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User home directory: C:/Users/wgg
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User working directory: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4
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User country: CN
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User language: zh
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User locale: zh_CN
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RDI_BASEROOT: C:/Xilinx/Vivado
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HDI_APPROOT: C:/Xilinx/Vivado/2017.4
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RDI_DATADIR: C:/Xilinx/Vivado/2017.4/data
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RDI_BINDIR: C:/Xilinx/Vivado/2017.4/bin
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Vivado preferences file location: C:/Users/wgg/AppData/Roaming/Xilinx/Vivado/2017.4/vivado.xml
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Vivado preferences directory: C:/Users/wgg/AppData/Roaming/Xilinx/Vivado/2017.4/
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Vivado layouts directory: C:/Users/wgg/AppData/Roaming/Xilinx/Vivado/2017.4/layouts
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PlanAhead jar file location: C:/Xilinx/Vivado/2017.4/lib/classes/planAhead.jar
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Vivado log file location: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/vivado.log
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Vivado journal file location: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/vivado.jou
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Engine tmp dir: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/.Xil/Vivado-11396-DESKTOP-C6I6OAQ
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GUI allocated memory: 187 MB
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GUI max memory: 3,052 MB
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Engine allocated memory: 584 MB
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Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
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*/
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// TclEventType: START_GUI
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// Tcl Message: start_gui
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// TclEventType: PROJECT_OPEN_DIALOG
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// [GUI Memory]: 63 MB (+64093kb) [00:00:05]
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// [Engine Memory]: 520 MB (+394111kb) [00:00:05]
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// Opening Vivado Project: E:\work-Lab\USTCRVSoC\hardware\Vivado\nexys4\USTCRVSoC-nexys4\USTCRVSoC-nexys4.xpr. Version: Vivado v2017.4
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// bs (cj): Open Project : addNotify
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// TclEventType: DEBUG_PROBE_SET_CHANGE
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// Tcl Message: open_project E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/USTCRVSoC-nexys4.xpr
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// TclEventType: MSGMGR_MOVEMSG
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// TclEventType: FILE_SET_NEW
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// TclEventType: RUN_CURRENT
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// TclEventType: PROJECT_NEW
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// [GUI Memory]: 73 MB (+6894kb) [00:00:07]
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// [Engine Memory]: 581 MB (+36276kb) [00:00:07]
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// Tcl Message: open_project E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/USTCRVSoC-nexys4.xpr
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// Tcl Message: Scanning sources... Finished scanning sources
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// Tcl Message: INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified
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// TclEventType: PROJECT_NEW
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// [GUI Memory]: 101 MB (+24904kb) [00:00:08]
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// [Engine Memory]: 631 MB (+22173kb) [00:00:08]
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// [GUI Memory]: 126 MB (+21047kb) [00:00:09]
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// [GUI Memory]: 137 MB (+5136kb) [00:00:09]
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// [Engine Memory]: 679 MB (+17205kb) [00:00:09]
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// Tcl Message: INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2017.4/data/ip'.
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// HMemoryUtils.trashcanNow. Engine heap size: 680 MB. GUI used memory: 42 MB. Current time: 2/26/19 7:48:56 PM CST
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// Project name: USTCRVSoC-nexys4; location: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4; part: xc7a100tcsg324-1
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dismissDialog("Open Project"); // bs (cj)
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// TclEventType: DG_ANALYSIS_MSG_RESET
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// TclEventType: DG_GRAPH_GENERATED
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// [Engine Memory]: 747 MB (+34981kb) [00:00:13]
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// Tcl Message: update_compile_order -fileset sources_1
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// Elapsed time: 191 seconds
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selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // aw (f, cj)
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selectMenuItem(PAResourceCommand.PACommandNames_RUN_SYNTHESIS, "Run Synthesis"); // ac (cj)
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// Run Command: PAResourceCommand.PACommandNames_RUN_SYNTHESIS
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// bs (cj): Starting Design Runs : addNotify
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// TclEventType: RUN_LAUNCH
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// Tcl Message: launch_runs synth_1 -jobs 8
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// TclEventType: RUN_MODIFY
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// Tcl Message: [Tue Feb 26 19:52:10 2019] Launched synth_1... Run output will be captured here: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/USTCRVSoC-nexys4.runs/synth_1/runme.log
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dismissDialog("Starting Design Runs"); // bs (cj)
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// TclEventType: RUN_COMPLETED
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// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking too long to process. Increasing delay to 2000 ms.
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// ah (cj): Synthesis Completed: addNotify
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// Elapsed time: 185 seconds
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selectButton(RDIResource.BaseDialog_OK, "OK"); // a (ah)
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// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
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// bs (cj): Resetting Runs : addNotify
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// TclEventType: RUN_MODIFY
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// TclEventType: RUN_RESET
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// TclEventType: RUN_MODIFY
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// Tcl Message: reset_run impl_1
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// bs (cj): Starting Design Runs : addNotify
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// TclEventType: RUN_LAUNCH
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// TclEventType: RUN_MODIFY
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// Tcl Message: launch_runs impl_1 -jobs 8
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// Tcl Message: [Tue Feb 26 19:55:16 2019] Launched impl_1... Run output will be captured here: E:/work-Lab/USTCRVSoC/hardware/Vivado/nexys4/USTCRVSoC-nexys4/USTCRVSoC-nexys4.runs/impl_1/runme.log
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dismissDialog("Starting Design Runs"); // bs (cj)
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// TclEventType: RUN_STEP_COMPLETED
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// TclEventType: RUN_COMPLETED
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