This website requires JavaScript.
Explore
Help
Sign In
FPGA
/
USTC-RVSoC
Watch
1
Star
0
Fork
0
You've already forked USTC-RVSoC
mirror of
https://github.com/WangXuan95/USTC-RVSoC.git
synced
2025-01-30 23:02:55 +08:00
Code
Issues
Projects
Releases
Wiki
Activity
USTC-RVSoC
/
hardware
/
Vivado
/
nexys4
/
USTCRVSoC-nexys4
/
USTCRVSoC-nexys4.cache
/
wt
History
WangXuan95
0840f54aa6
合并ISP-UART和USER-UART，添加Nexys4开发板工程
2019-02-26 19:45:11 +08:00
..
gui_handlers.wdf
合并ISP-UART和USER-UART，添加Nexys4开发板工程
2019-02-26 19:45:11 +08:00
java_command_handlers.wdf
合并ISP-UART和USER-UART，添加Nexys4开发板工程
2019-02-26 19:45:11 +08:00
project.wpc
合并ISP-UART和USER-UART，添加Nexys4开发板工程
2019-02-26 19:45:11 +08:00
synthesis_details.wdf
合并ISP-UART和USER-UART，添加Nexys4开发板工程
2019-02-26 19:36:30 +08:00
synthesis.wdf
合并ISP-UART和USER-UART，添加Nexys4开发板工程
2019-02-26 19:36:30 +08:00
webtalk_pa.xml
合并ISP-UART和USER-UART，添加Nexys4开发板工程
2019-02-26 19:45:11 +08:00
