mirror of
https://github.com/pConst/basic_verilog.git
synced 2025-01-28 07:02:55 +08:00
17 lines
466 B
Plaintext
17 lines
466 B
Plaintext
|
#------------------------------------------------------------------------------
|
||
|
# .gitignore for Mentor Modelsim
|
||
|
# Konstantin Pavlov, pavlovconst@gmail.com
|
||
|
#------------------------------------------------------------------------------
|
||
|
|
||
|
# INFO ------------------------------------------------------------------------
|
||
|
# rename the file to ".gitignore" and place into your testbench directory
|
||
|
#
|
||
|
|
||
|
|
||
|
transcript
|
||
|
work*
|
||
|
modelsim.ini
|
||
|
start_time.txt
|
||
|
vsim.wlf
|
||
|
|