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53 lines
1.4 KiB
Systemverilog
53 lines
1.4 KiB
Systemverilog
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//------------------------------------------------------------------------------
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// hex2ascii.sv
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// published as part of https://github.com/pConst/basic_verilog
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// Konstantin Pavlov, pavlovconst@gmail.com
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//------------------------------------------------------------------------------
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// INFO ------------------------------------------------------------------------
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// Converts 8-bit human-readable ASCII char to 4-bit binary nibble
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// For example, "F" char becomes 4'b1111, "4" char becomes 4'b0100
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//
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/* --- INSTANTIATION TEMPLATE BEGIN ---
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ascii2hex AH (
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.ascii( ),
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.hex( )
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);
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--- INSTANTIATION TEMPLATE END ---*/
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module ascii2hex (
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input [7:0] ascii,
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output [3:0] hex
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);
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always_comb begin
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case( ascii[7:0] )
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8'd48 : hex[3:0] = 4'h0;
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8'd49 : hex[3:0] = 4'h1;
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8'd50 : hex[3:0] = 4'h2;
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8'd51 : hex[3:0] = 4'h3;
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8'd52 : hex[3:0] = 4'h4;
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8'd53 : hex[3:0] = 4'h5;
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8'd54 : hex[3:0] = 4'h6;
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8'd55 : hex[3:0] = 4'h7;
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8'd56 : hex[3:0] = 4'h8;
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8'd57 : hex[3:0] = 4'h9;
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8'd65, 8'd97 : hex[3:0] = 4'hA; // lowercase and capital letters
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8'd66, 8'd98 : hex[3:0] = 4'hB;
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8'd67, 8'd99 : hex[3:0] = 4'hC;
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8'd68, 8'd100: hex[3:0] = 4'hD;
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8'd69, 8'd101: hex[3:0] = 4'hE;
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8'd70, 8'd102: hex[3:0] = 4'hF;
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default : hex[3:0] = 4'h0;
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endcase
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endmodule
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