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mirror of https://github.com/pConst/basic_verilog.git synced 2025-01-14 06:42:54 +08:00

Added helper script to launch and initialize system console

This commit is contained in:
Konstantin Pavlov 2019-05-24 14:16:41 +03:00
parent 6e6b4905c5
commit 5a05b4df56

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@echo off
rem ------------------------------------------------------------------------------
rem init_system_console.bat
rem Konstantin Pavlov, pavlovconst@gmail.com
rem
rem This is a support script for launching Quartus system-console
rem in console mode with user-defined initialization script
rem ------------------------------------------------------------------------------
@echo on
C:\intelFPGA_lite\17.0\quartus\sopc_builder\bin\system-console.exe --rc_script="J:\dev\system_console_init.tcl" --cli