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mirror of https://github.com/pConst/basic_verilog.git synced 2025-01-14 06:42:54 +08:00

Added script to program Altera/Intel devices

This commit is contained in:
Konstantin Pavlov 2019-10-02 13:40:27 +03:00
parent 928bced8b1
commit 6b99e1fdab
2 changed files with 22 additions and 1 deletions

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#------------------------------------------------------------------------------
# post_flow.tcl
# post_flow_quartus.tcl
# Konstantin Pavlov, pavlovconst@gmail.com
#------------------------------------------------------------------------------

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scripts/program_all.bat Normal file
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@echo off
rem ------------------------------------------------------------------------------
rem program_all.bat
rem Konstantin Pavlov, pavlovconst@gmail.com
rem ------------------------------------------------------------------------------
echo "Listing programmers"
C:\intelFPGA_lite\17.0\quartus\bin64\quartus_pgm -l
echo "Programming first FPGA in the chain"
C:\intelFPGA_lite\17.0\quartus\bin64\quartus_pgm -c ^
"USB-Blaster on 192.168.0.182 [USB-1]" -m jtag -o ^
"P;D:\project1\main.sof@1"
echo "Programming second FPGA in the chain"
C:\intelFPGA_lite\17.0\quartus\bin64\quartus_pgm -c ^
"USB-Blaster on 192.168.0.182 [USB-1]" -m jtag -o ^
"P;D:\project2\main.sof@2"
pause
exit