FPGA/basic_verilog
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Konstantin Pavlov 2022-12-09 16:02:14 +03:00
parent b93545503e
commit 72cb6ac1d2
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[submodule "vivado_design_space_explorer_template"] [submodule "vivado_design_space_explorer_template"]
path = vivado_design_space_explorer_template path = vivado_design_space_explorer_template
url = https://github.com/pConst/vivado_design_space_explorer_template.git url = https://github.com/pConst/vivado_design_space_explorer_template.git
[submodule "quartus_design_space_explorer_template"]
path = quartus_design_space_explorer_template
url = https://github.com/pConst/quartus_design_space_explorer_template.git

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quartus_design_space_explorer_template Submodule

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Subproject commit 76c7e9f7bd449e1edebd47c9e1dbb808c39c3abe