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mirror of https://github.com/pConst/basic_verilog.git synced 2025-01-14 06:42:54 +08:00

Added new benchmarks

This commit is contained in:
Konstantin Pavlov 2022-11-11 14:49:31 +03:00
parent 553e74c437
commit a9f7d50998

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@ -1,10 +1,11 @@
// published as part of https://github.com/pConst/basic_verilog
// Konstantin Pavlov, pavlovconst@gmail.com
Compilation time results for reference benchmark projects
=========================================================
Xeon E5-2630 v4, RAM 32GB, Windows 7
------------------------------------
quartus_benchmark - 4m 58s ( Quartus Lite 17 )
@ -13,7 +14,6 @@ gowin_benchmark - 4m 15s ( Gowin_V1.9.6Beta )
ise_benchmark - 9m 10s ( ISE 12.4 )
Xeon E5-2630 v4, RAM 32GB, Windows 7,
project files on RamDisk
-------------------------------------
@ -21,10 +21,17 @@ quartus_benchmark - 4m 57s ( Quartus Lite 17 )
vivado_benchmark - 5m 56s ( Vivado 2019.2 )
Xeon E5-2630 v4, RAM 32GB, Windows 7,
project files on RamDisk,
HyperThreading OFF
-------------------------------------
quartus_benchmark - 4m 50s ( Quartus Lite 17 )
vivado_benchmark - 5m 43s ( Vivado 2019.2 )
AMD Ryzen 7 5700G, RAM 64GB, Xubuntu 22.04.1
HyperThreading OFF
------------------------------------
quartus_benchmark - 1m 58s ( Quartus Lite 20.1.1 )
vivado_benchmark - 4m 07s ( Vivado 2021.2 )