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Updated Quartus Makefile and the reference project

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This commit is contained in:
Konstantin Pavlov 2021-04-12 12:45:55 +03:00
parent 111dbc65c6
commit aa52420d17
16 changed files with 182 additions and 177 deletions
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29
benchmark_projects/quartus_benchmark/test.qpf
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@ -1,31 +1,2 @@
# -------------------------------------------------------------------------- #
#
# Copyright (C) 2017 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Intel and sold by Intel or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 17.0.0 Build 595 04/25/2017 SJ Standard Edition
# Date created = 11:22:30 September 26, 2018
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "17.0"
DATE = "11:22:30 September 26, 2018"
# Revisions
PROJECT_REVISION = "test"

18
example_projects/fast_counter_iterative_test/Makefile
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@ -23,7 +23,7 @@ VAR = $(shell seq $(VAR_START) ${VAR_STOP})
JOBS = $(addprefix job,${VAR})
.PHONY: all fmax clean
.PHONY: all report clean
all: fmax
@ -36,18 +36,24 @@ ${JOBS}: job%:
$(MAKE) -C ./$* stap
fmax: ${JOBS}
echo "FMAX summary report for iterative compilation" | tee > ./fmax.rpt; \
echo '# FMAX summary report for iterative compilation' > ./fmax.csv; \
for (( var = $(VAR_START); var <= $(VAR_STOP); var++ )); do \
echo "$$var" | tee >> ./fmax.rpt; \
{ echo $$var ', '; \
cat ./$$var/OUTPUT/test.sta.rpt | \
grep -A2 '; Fmax ; Restricted Fmax ; Clock Name ; Note ;' | \
tail -n1 | cut -d\; -f3 | cut -d' ' -f2; echo ', '; \
cat ./$$var/OUTPUT/test.sta.rpt | \
grep -A3 '; Fmax ; Restricted Fmax ; Clock Name ; Note ;' | \
tail -n2 | tee >> ./fmax.rpt; \
tail -n1 | cut -d\; -f3 | cut -d' ' -f2; } >> ./fmax.csv; \
done; \
echo 'fmax.rpt file done'
echo 'fmax.csv file done'
report: ./fmax.csv
cat ./fmax.csv
clean:
for (( var = $(VAR_START); var <= $(VAR_STOP); var++ )); do \
rm -rfv ./$$var; \
rm -rfv ./fmax.rpt; \
rm -rfv ./fmax.csv; \
done

38
example_projects/fast_counter_iterative_test/base/Makefile
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@ -29,7 +29,7 @@
PROJ_DIR = $(shell pwd)
PROJ = $(shell ls -1 *.qpf | tail -n1 | awk '{ gsub(".qpf","") } 1' )
#SRCS = $(shell ls -R1 SOURCE/*.{v,sv,vh,sdc,tcl,hex,bin} 2>/dev/null | grep -v ':' )
№SRCS = $(shell ls -R1 SOURCE/* )
SRCS = $(shell ls -R1 SOURCE/* )
QPF = $(PROJ).qpf
QSF = $(PROJ).qsf
@ -46,9 +46,11 @@ FIT_REPORT = ./OUTPUT/$(PROJ).fit.rpt
DSE_CONFIG = $(PROJ).dse
TARGET_IP = '192.168.1.1'
TARGET_PORT = 'USB-1'
TARGET_CHIP = '1'
TARGET_IP = 192.168.1.1
TARGET_PORT = USB-1
TARGET_CHIP = 1
QUARTUS_DIR = /cygdrive/c/intelFPGA_lite/20.1/quartus/bin64/
@ -69,7 +71,7 @@ gui:
$(MAP_REPORT): $(SRCS) $(QPF) $(QSF)
$(shell if test -f $(PRE_SCRIPT); then quartus_sh -t $(PRE_SCRIPT) compile $(PROJ) $(PROJ); fi )
quartus_map --no_banner \
$(QUARTUS_DIR)quartus_map --no_banner \
--read_settings_files=on \
--write_settings_files=off \
--64bit $(PROJ) -c $(PROJ)
@ -78,10 +80,10 @@ map: $(PROJ).map.rpt
$(FIT_REPORT): $(MAP_REPORT)
# quartus_cdb --read_settings_files=on \
# $(QUARTUS_DIR)quartus_cdb --read_settings_files=on \
# --write_settings_files=off \
# --64bit $(PROJ) -c $(PROJ)
quartus_fit --no_banner \
$(QUARTUS_DIR)quartus_fit --no_banner \
--read_settings_files=on \
--write_settings_files=off \
--inner_num=1 \
@ -94,7 +96,7 @@ fit: $(FIT_REPORT)
$(SOF): $(FIT_REPORT)
quartus_asm --no_banner \
$(QUARTUS_DIR)quartus_asm --no_banner \
--read_settings_files=off \
--write_settings_files=off \
--64bit $(PROJ) -c $(PROJ)
@ -102,22 +104,22 @@ asm: $(SOF)
sta: $(FIT_REPORT)
quartus_sta $(PROJ) -c $(PROJ)
$(QUARTUS_DIR)quartus_sta $(PROJ) -c $(PROJ)
#$(shell if test -f $(POST_SCRIPT); then quartus_sh -t $(POST_SCRIPT) compile $(PROJ) $(PROJ); fi )
stap: $(FIT_REPORT)
quartus_sta --parallel --model=slow $(PROJ) -c $(PROJ)
$(QUARTUS_DIR)quartus_sta --parallel --model=slow $(PROJ) -c $(PROJ)
#$(shell if test -f $(POST_SCRIPT); then quartus_sh -t $(POST_SCRIPT) compile $(PROJ) $(PROJ); fi )
$(POF): $(SOF)
quartus_cpf --no_banner \
$(QUARTUS_DIR)quartus_cpf --no_banner \
-c $(SOF) $(POF)
$(RBF): $(SOF)
quartus_cpf --no_banner \
$(QUARTUS_DIR)quartus_cpf --no_banner \
-c $(SOF) $(RBF)
$(JAM): $(SOF)
quartus_cpf --no_banner \
$(QUARTUS_DIR)quartus_cpf --no_banner \
-c $(SOF) $(JAM)
sof: $(SOF)
pof: $(POF)
@ -126,17 +128,17 @@ jam: $(JAM)
prog: sof
quartus_pgm --no_banner \
$(QUARTUS_DIR)quartus_pgm --no_banner \
-c "USB-Blaster on $(TARGET_IP) [$(TARGET_PORT)]" -m jtag \
-o "P;$(SOF)@$(TARGET_CHIP)"
prog_pof: pof
quartus_pgm --no_banner \
$(QUARTUS_DIR)quartus_pgm --no_banner \
-c "USB-Blaster on $(TARGET_IP) [$(TARGET_PORT)]" -m jtag \
-o "BVP;$(POF)@$(TARGET_CHIP)"
prog_rbf: rbf
quartus_pgm --no_banner \
$(QUARTUS_DIR)quartus_pgm --no_banner \
-c "USB-Blaster on $(TARGET_IP) [$(TARGET_PORT)]" -m jtag \
-o "BVP;$(RBF)@$(TARGET_CHIP)"
@ -159,7 +161,7 @@ clean:
dse: $(DSE_CONFIG)
quartus_dse --no_banner \
$(QUARTUS_DIR)quartus_dse --no_banner \
--terminate off \
--num-parallel-processors 10 \
--auto-discover-files on \
@ -200,7 +202,7 @@ gtkwave: $(SRCS)
stp:
quartus_stp --no_banner \
$(QUARTUS_DIR)quartus_stp --no_banner \
$(QPF)

0
example_projects/fast_counter_iterative_test/Redme.txt → example_projects/fast_counter_iterative_test/redme.md
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21
example_projects/quartus_test_prj_template_v3/.gitignore vendored Normal file
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@ -0,0 +1,21 @@
# junk files
*.qws
*_assignment_defaults.qdf
c5_pin_model_dump.txt
*.ipregen.rpt
*_summary.csv
*_early_pwr.csv
# junk directories
/.qsys_edit
/db
/incremental_db
/greybox_tmp
# design space explorer
/dse
dse1_base.qpf
dse1_base.qsf
*.dse.rpt
*.archive.rpt

96
scripts/Makefile → example_projects/quartus_test_prj_template_v3/Makefile
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@ -28,60 +28,83 @@
PROJ_DIR = $(shell pwd)
PROJ = $(shell ls -1 *.qpf | tail -n1 | awk '{ gsub(".qpf","") } 1' )
#SRCS = $(shell ls -R1 SOURCE/*.{v,sv,vh,sdc,tcl,hex,bin} 2>/dev/null | grep -v ':' )
№SRCS = $(shell ls -R1 SOURCE/* )
#SRCS = $(shell ls -R1 src/*.{v,sv,vh,sdc,tcl,hex,bin} 2>/dev/null | grep -v ':' )
SRCS = $(shell ls -R1 src/* )
QPF = $(PROJ).qpf
QSF = $(PROJ).qsf
SOF = ./OUTPUT/$(PROJ).sof
POF = ./OUTPUT/$(PROJ).pof
RBF = ./OUTPUT/$(PROJ).rbf
JAM = ./OUTPUT/$(PROJ).jam
SOF = ./out/$(PROJ).sof
POF = ./out/$(PROJ).pof
RBF = ./out/$(PROJ).rbf
JAM = ./out/$(PROJ).jam
PRE_SCRIPT = './DEBUG/pre_flow.tcl'
POST_SCRIPT = './DEBUG/post_flow.tcl'
MAP_REPORT = ./OUTPUT/$(PROJ).map.rpt
FIT_REPORT = ./OUTPUT/$(PROJ).fit.rpt
MAP_REPORT = ./out/$(PROJ).map.rpt
FIT_REPORT = ./out/$(PROJ).fit.rpt
DSE_CONFIG = $(PROJ).dse
TARGET_IP = '192.168.1.1'
TARGET_PORT = 'USB-1'
TARGET_CHIP = '1'
TARGET_IP = 192.168.1.1
TARGET_PORT = USB-1
TARGET_CHIP = 1
# OS deterction algorithm
ifeq '$(findstring ;,$(PATH))' ';'
DET_OS := Windows
else
DET_OS := $(shell uname 2>/dev/null || echo Unknown)
DET_OS := $(patsubst CYGWIN%,Cygwin,$(DET_OS))
DET_OS := $(patsubst MSYS%,MSYS,$(DET_OS))
DET_OS := $(patsubst MINGW%,MSYS,$(DET_OS))
endif
.PHONY: all info clean stp gui
# selecting Quartus based on detected OS
ifeq '$(DET_OS)' 'Cygwin'
QUARTUS_DIR = /cygdrive/c/intelFPGA_lite/20.1/quartus/bin64/
else
QUARTUS_DIR = ~/intelFPGA_lite/20.1/quartus/bin64/
endif
.SILENT: info clean
.PHONY: all info gui clean stp report
all: sta sof
info:
echo -e \\n ' Project directory: ' $(PROJ_DIR) \
echo -e \\n ' Detected OS: ' $(DET_OS)\
\\n ' Project directory: ' $(PROJ_DIR) \
\\n ' Project name: ' $(PROJ) \
\\n ' Preject sources: ' $(SRCS)
gui:
quartus $(QPF) 1>/dev/null
$(MAP_REPORT): $(SRCS) $(QPF) $(QSF)
$(shell if test -f $(PRE_SCRIPT); then quartus_sh -t $(PRE_SCRIPT) compile $(PROJ) $(PROJ); fi )
quartus_map --no_banner \
$(QUARTUS_DIR)quartus_map --no_banner \
--read_settings_files=on \
--write_settings_files=off \
--64bit $(PROJ) -c $(PROJ)
# dont use --effort=fast because it can dramatically increase fitting time
map: $(PROJ).map.rpt
map: $(MAP_REPORT)
$(FIT_REPORT): $(MAP_REPORT)
# quartus_cdb --read_settings_files=on \
# $(QUARTUS_DIR)quartus_cdb --read_settings_files=on \
# --write_settings_files=off \
# --64bit $(PROJ) -c $(PROJ)
quartus_fit --no_banner \
$(QUARTUS_DIR)quartus_fit --no_banner \
--read_settings_files=on \
--write_settings_files=off \
--inner_num=1 \
@ -94,7 +117,7 @@ fit: $(FIT_REPORT)
$(SOF): $(FIT_REPORT)
quartus_asm --no_banner \
$(QUARTUS_DIR)quartus_asm --no_banner \
--read_settings_files=off \
--write_settings_files=off \
--64bit $(PROJ) -c $(PROJ)
@ -102,22 +125,22 @@ asm: $(SOF)
sta: $(FIT_REPORT)
quartus_sta $(PROJ) -c $(PROJ)
$(QUARTUS_DIR)quartus_sta $(PROJ) -c $(PROJ)
#$(shell if test -f $(POST_SCRIPT); then quartus_sh -t $(POST_SCRIPT) compile $(PROJ) $(PROJ); fi )
stap: $(FIT_REPORT)
quartus_sta --parallel --model=slow $(PROJ) -c $(PROJ)
$(QUARTUS_DIR)quartus_sta --parallel --model=slow $(PROJ) -c $(PROJ)
#$(shell if test -f $(POST_SCRIPT); then quartus_sh -t $(POST_SCRIPT) compile $(PROJ) $(PROJ); fi )
$(POF): $(SOF)
quartus_cpf --no_banner \
$(QUARTUS_DIR)quartus_cpf --no_banner \
-c $(SOF) $(POF)
$(RBF): $(SOF)
quartus_cpf --no_banner \
$(QUARTUS_DIR)quartus_cpf --no_banner \
-c $(SOF) $(RBF)
$(JAM): $(SOF)
quartus_cpf --no_banner \
$(QUARTUS_DIR)quartus_cpf --no_banner \
-c $(SOF) $(JAM)
sof: $(SOF)
pof: $(POF)
@ -126,40 +149,49 @@ jam: $(JAM)
prog: sof
quartus_pgm --no_banner \
$(QUARTUS_DIR)quartus_pgm --no_banner \
-c "USB-Blaster on $(TARGET_IP) [$(TARGET_PORT)]" -m jtag \
-o "P;$(SOF)@$(TARGET_CHIP)"
prog_pof: pof
quartus_pgm --no_banner \
$(QUARTUS_DIR)quartus_pgm --no_banner \
-c "USB-Blaster on $(TARGET_IP) [$(TARGET_PORT)]" -m jtag \
-o "BVP;$(POF)@$(TARGET_CHIP)"
prog_rbf: rbf
quartus_pgm --no_banner \
$(QUARTUS_DIR)quartus_pgm --no_banner \
-c "USB-Blaster on $(TARGET_IP) [$(TARGET_PORT)]" -m jtag \
-o "BVP;$(RBF)@$(TARGET_CHIP)"
# report compilation time and timing summary
report:
# TODO
clean:
# clean common junk files
rm -rfv $(PROJ).qws c5_pin_model_dump.txt $(PROJ).ipregen.rpt .qsys_edit/
rm -rfv *.qws
rm -rfv *_assignment_defaults.qdf
rm -rfv c5_pin_model_dump.txt
rm -rfv *ipregen.rpt
rm -rfv .qsys_edit/
# clean compilation databases
rm -rfv db/ incremental_db/ greybox_tmp/
# clean output directory
rm -rfv OUTPUT/
rm -rfv out/
# clean hard memory controller
rm -rfv ddr3_hmc_ddr3_0_p0_0_summary.csv ddr3_hmc_ddr3_0_p0_1_summary.csv
rm -rfv *_ddr3_0_p0_0_summary.csv
# clean design space explorer files
rm -rfv dse/ dse1_base.qpf dse1_base.qsf $(PROJ).dse.rpt $(PROJ).archive.rpt
# clean early power estimator files
rm -rfv $(PROJ)_early_pwr.csv
rm -rfv *_early_pwr.csv
# TODO: add project-specific files to remove here
dse: $(DSE_CONFIG)
quartus_dse --no_banner \
$(QUARTUS_DIR)quartus_dse --no_banner \
--terminate off \
--num-parallel-processors 10 \
--auto-discover-files on \
@ -200,7 +232,7 @@ gtkwave: $(SRCS)
stp:
quartus_stp --no_banner \
$(QUARTUS_DIR)quartus_stp --no_banner \
$(QPF)

2
example_projects/quartus_test_prj_template_v3/readme.md Normal file
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@ -0,0 +1,2 @@
Quartus IDE test project template

0
example_projects/test_prj_template_v2/clk_divider.sv → example_projects/quartus_test_prj_template_v3/src/clk_divider.sv
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0
example_projects/test_prj_template_v2/main.sdc → example_projects/quartus_test_prj_template_v3/src/main.sdc
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28
example_projects/test_prj_template_v2/main.sv → example_projects/quartus_test_prj_template_v3/src/main.sv
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@ -4,7 +4,7 @@
//------------------------------------------------------------------------------
// INFO ------------------------------------------------------------------------
// Test project template, v2
// Test project template, v3
//
// - use this as a boilerplate project for fast prototyping
// - inputs and outputs are registered to allow valid timequest output
@ -36,20 +36,20 @@ end
// place your test logic here ==================================================
// logic [31:0] divided_clk;
// clk_divider #(
// .WIDTH( 32 )
// ) cd1 (
// .clk( clk ),
// .nrst( nrst ),
// .ena( 1'b1 ),
// .out( divided_clk[31:0] )
// );
logic [31:0] divided_clk;
clk_divider #(
.WIDTH( 32 )
) cd1 (
.clk( clk ),
.nrst( nrst ),
.ena( 1'b1 ),
.out( divided_clk[31:0] )
);
// logic [`WIDTH-1:0] out_data_comb = 0;
// always_comb begin
// out_data_comb <= out_data_comb[`WIDTH-1:0] ^ divided_clk[31:0];
// end
logic [`WIDTH-1:0] out_data_comb = 0;
always_comb begin
out_data_comb <= out_data_comb[`WIDTH-1:0] ^ divided_clk[31:0];
end
// =============================================================================

2
example_projects/quartus_test_prj_template_v3/src/readme.md Normal file
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@ -0,0 +1,2 @@
verilog rtl code directory

2
example_projects/quartus_test_prj_template_v3/tb/readme.md Normal file
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@ -0,0 +1,2 @@
rtl code testbenches directory

1
example_projects/quartus_test_prj_template_v3/test.qpf Normal file
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@ -0,0 +1 @@
PROJECT_REVISION = "test"

21
example_projects/quartus_test_prj_template_v3/test.qsf Normal file
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@ -0,0 +1,21 @@
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CGXFC4C7F27C8
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY out
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name TOP_LEVEL_ENTITY main
set_global_assignment -name SYSTEMVERILOG_FILE ./src/main.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./src/clk_divider.sv
set_global_assignment -name SDC_FILE ./src/main.sdc
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

31
example_projects/test_prj_template_v2/test.qpf
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@ -1,31 +0,0 @@
# -------------------------------------------------------------------------- #
#
# Copyright (C) 2017 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Intel and sold by Intel or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 17.0.0 Build 595 04/25/2017 SJ Standard Edition
# Date created = 11:22:30 September 26, 2018
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "17.0"
DATE = "11:22:30 September 26, 2018"
# Revisions
PROJECT_REVISION = "test"

24
example_projects/test_prj_template_v2/test.qsf
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@ -1,24 +0,0 @@
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CGXFC4C7F27C8
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.0.0
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY OUTPUT
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name TOP_LEVEL_ENTITY main
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name SYSTEMVERILOG_FILE main.sv
set_global_assignment -name SYSTEMVERILOG_FILE clk_divider.sv
set_global_assignment -name SDC_FILE main.sdc
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top