1
0
mirror of https://github.com/pConst/basic_verilog.git synced 2025-01-14 06:42:54 +08:00

Added testbench screenshots

This commit is contained in:
Konstantin Pavlov 2020-05-06 03:56:30 +03:00
parent e68483d99a
commit c2ec8d320d
2 changed files with 0 additions and 0 deletions

BIN
pdm_modulator_tb.png Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 89 KiB

BIN
pwm_modulator_tb.png Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 84 KiB