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Added Vivado-specific scripts
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scripts/allow_wors.tcl
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scripts/allow_wors.tcl
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#------------------------------------------------------------------------------
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# allow_wors.tcl
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# Konstantin Pavlov, pavlovconst@gmail.com
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#------------------------------------------------------------------------------
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# INFO ------------------------------------------------------------------------
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# Simple script to add wor type support in Vivado
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# Add this script as a tcl.pre for the Synthesis step
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set_param synth.elaboration.rodinMoreOptions "rt::set_parameter compatibilityMode true"
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scripts/jtag_to_axi_master.tcl
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scripts/jtag_to_axi_master.tcl
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#------------------------------------------------------------------------------
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# jtag_to_axi_master.tcl
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# Konstantin Pavlov, pavlovconst@gmail.com
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#------------------------------------------------------------------------------
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# INFO ------------------------------------------------------------------------
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# Use this script to read/write AXI bus through "JTAG to AXI Master" IP-core
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# value should be 8 HEX digits == 32bit
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proc wr {address value} {
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#set address [string range $address 2 [expr {[string length $address]-1}]]
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create_hw_axi_txn -force wr_tx [get_hw_axis hw_axi_1] \
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-address $address -data $value -len 1 -type write
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run_hw_axi -quiet wr_tx
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}
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proc rd {address} {
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#set address [string range $address 2 [expr {[string length $address]-1}]]
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create_hw_axi_txn -force rd_tx [get_hw_axis hw_axi_1] \
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-address $address -len 1 -type read
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run_hw_axi -quiet rd_tx
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return 0x[get_property DATA [get_hw_axi_txn rd_tx]]
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}
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