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Author SHA1 Message Date
Konstantin Pavlov
1efbd7c243 Added soft_latch module and testbench 2021-07-09 17:24:20 +03:00
Konstantin Pavlov
d262582ea9
Update README.md 2021-07-07 17:39:43 +03:00
Konstantin Pavlov
2845a2a836 Updated lifo module to support FWFT and normal modes 2021-07-06 14:15:35 +03:00
Konstantin Pavlov
452b3574ff Added single clock fifo modules (two variants) 2021-07-05 09:12:14 +03:00
Konstantin Pavlov
cb224284b1 Added synchronizer modules 2021-06-11 17:39:06 +03:00
Konstantin Pavlov
d8beb37f01 Added Vivado-specific scripts 2021-06-03 17:01:55 +03:00
Konstantin Pavlov
48e9ddef7e Added Modelsim cleaning script 2021-05-27 12:54:51 +03:00
Konstantin Pavlov
aa52420d17 Updated Quartus Makefile and the reference project 2021-04-12 12:45:55 +03:00
Konstantin Pavlov
111dbc65c6 Test project for iterative compilation Quartus projects 2021-02-05 16:13:27 +03:00
Konstantin Pavlov
3619810053 Added fast counter sources 2021-02-05 16:12:05 +03:00
Konstantin Pavlov
c243e1d918 Added Quartus Makefile. Customizable and gives faster compilation 2021-02-05 16:10:16 +03:00
Konstantin Pavlov
f3075c28a2 Added SV version of UART receiver 2021-01-27 10:58:54 +03:00
Konstantin Pavlov
536a8b83d2 Rewriting UART modules to SystemVerilog 2021-01-26 15:30:56 +03:00
Konstantin Pavlov
b4b191c26f Minor code style update 2021-01-26 15:24:09 +03:00
Konstantin Pavlov
cf3b4f5d20 Moved all bencmarks to the separate directory 2021-01-26 15:16:11 +03:00
Konstantin Pavlov
1b844726dc
Update README.md 2020-12-22 11:14:44 +03:00
Konstantin Pavlov
3760990e5a Added UART-like shifters for for simple synchronous messaging inside the FPGA or between FPGAs 2020-12-18 16:14:10 +03:00
Konstantin Pavlov
68922a34d2 Updated benchmark projects. Added 'benchmark_results.txt' that i got on my machine 2020-12-17 18:42:52 +03:00
Konstantin Pavlov
d44ef08c2c Added benchmark project for Xilinx ISE Design Suite 2020-12-17 17:58:16 +03:00
Konstantin Pavlov
fee423776f Updates clean script for Quartus projects 2020-12-15 17:19:48 +03:00
Konstantin Pavlov
8980f487e9 Added benchmark project for Gowin FPGAs 2020-12-11 13:49:16 +03:00
Konstantin Pavlov
303665d784 Added cleaning script for Vivado projects 2020-11-03 16:54:58 +03:00
Konstantin Pavlov
f5f3d32951 Fixes for delayed_event module 2020-11-03 11:23:37 +03:00
Konstantin Pavlov
2d2041a663 Fixed usedw[] calculations in preview_fifo. Other minor fixes 2020-10-30 11:51:59 +03:00
Konstantin Pavlov
eb69a3a374 Added project archieving for Quartus post-flow script 2020-10-30 11:48:19 +03:00
Konstantin Pavlov
002db3191e Added dalayed_event module 2020-10-30 11:40:27 +03:00
Konstantin Pavlov
3ddb800544 Updated preview_fifo to support two word writes 2020-08-09 01:08:56 +03:00
Konstantin Pavlov
aa1ac56e14 Added ALTERA_TAPS delay type 2020-07-16 16:33:04 +03:00
Konstantin Pavlov
b57c3a9ceb Updated delay module. Added block RAM implementation 2020-07-09 16:14:28 +03:00
Konstantin Pavlov
d2f436d5dc Added preview FIFO testbench 2020-07-09 16:09:20 +03:00
Konstantin Pavlov
d07d0ad5f4 Added preview FIFO 2020-07-09 16:02:57 +03:00
Konstantin Pavlov
bb246b3568 Updated edge_detect to v.3 2020-05-22 15:59:50 +03:00
Konstantin Pavlov
ea6833b63e Added DSE launch script 2020-05-22 14:47:06 +03:00
Konstantin Pavlov
05fd57f2b8 Added Quartus project cleaning script 2020-05-22 11:45:23 +03:00
Konstantin Pavlov
c2ec8d320d Added testbench screenshots 2020-05-06 03:56:30 +03:00
Konstantin Pavlov
e68483d99a Added PDM modulator 2020-05-06 03:52:20 +03:00
Konstantin Pavlov
380f3a1f14 Added PWM modulator module and a testbench 2020-05-05 06:52:51 +03:00
Konstantin Pavlov
d5030cfb5d Updated pulse_gen to ver.2 2020-05-05 06:51:23 +03:00
Konstantin Pavlov
eba4111ce1 Added JTAG server setup script 2020-04-23 18:03:21 +03:00
Konstantin Pavlov
ec0bdd4948 Minor fixes 2020-04-16 10:57:36 +03:00
Konstantin Pavlov
4da5e8bc96 Updated readme 2020-04-07 22:33:24 +03:00
Konstantin Pavlov
d82a3bc050 Merge branch 'master' of https://github.com/pConst/basic_verilog 2020-04-07 15:36:51 +03:00
Konstantin Pavlov
8d3ea380a9 added script to set project directory in Vivado 2020-04-07 14:30:32 +03:00
Konstantin Pavlov
573cc6e6b8 Added benchmark project for Vivado IDE 2020-04-07 14:29:25 +03:00
Konstantin Pavlov
1840a5a8ca Updated post flow script for Vivado 2020-04-07 14:14:19 +03:00
Konstantin Pavlov
ff356f13e0 Two random generators with different seed values 2020-02-28 17:55:54 +03:00
Konstantin Pavlov
8db4b773b9 Added test project template 2020-02-27 20:40:08 +03:00
Konstantin Pavlov
f1604e8736 Added gray code converters 2020-02-25 15:38:56 +03:00
Konstantin Pavlov
b8064ecef9 Fixed header info in some testbenches 2020-02-25 15:38:02 +03:00
Konstantin Pavlov
c189b88688 Added PRBS test sequence generator and chekker 2020-02-11 15:34:00 +03:00