FPGA/basic_verilog
1
0
Fork 0
mirror of https://github.com/pConst/basic_verilog.git synced 2025-02-04 07:12:56 +08:00
Code Issues Releases Wiki Activity
233 Commits 1 Branch 0 Tags
Commit Graph

1 Commits

Author SHA1 Message Date
Konstantin Pavlov
11ca69c348 Fixed Questa support in testbench_template 2022-12-29 17:01:18 +03:00