FPGA/basic_verilog
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3 Commits

Author SHA1 Message Date
Konstantin Pavlov
5abae5370e Update Modelsim gitignore 2022-07-03 16:38:37 +03:00
Konstantin Pavlov
68ec41121e Added gitignore and clen script for Gowin IDE projects 2022-05-16 18:58:36 +03:00
Konstantin Pavlov
39490aed15 Added typical .gitignore-files for FPGA projects 2021-10-28 10:03:57 +03:00