FPGA/basic_verilog
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4 Commits

Author SHA1 Message Date
Konstantin Pavlov
573cc6e6b8 Added benchmark project for Vivado IDE 2020-04-07 14:29:25 +03:00
Konstantin Pavlov
8db4b773b9 Added test project template 2020-02-27 20:40:08 +03:00
Konstantin Pavlov
5bde0a502e Added version generating script to example project 2019-04-16 04:46:38 +03:00
Konstantin Pavlov
1fdc31ad05 Added quartus benchmarking project 2019-04-15 02:37:45 +03:00