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Author SHA1 Message Date
Konstantin Pavlov
ff72cd4ff6 Added clean scripts 2022-12-12 03:23:58 +03:00
Konstantin Pavlov
de068b7426 Removed obsolete files 2022-12-12 03:19:02 +03:00
Konstantin Pavlov
c06a419792 Updated test prj up to Vivado 2021.2 2022-12-12 03:10:17 +03:00
Konstantin Pavlov
72cb6ac1d2 More submodules 2022-12-09 16:02:14 +03:00
Konstantin Pavlov
b93545503e Added fresh submodule 2022-12-02 17:32:23 +03:00
Konstantin Pavlov
f894f0997d Add more stats 2022-11-16 17:42:14 +03:00
Konstantin Pavlov
257c7fdff7 Fix template typo, 'block' paramerer is default 2022-11-16 17:07:08 +03:00
Konstantin Pavlov
65e4657650 Minor fix for read_ahead_buf 2022-11-11 15:51:08 +03:00
Konstantin Pavlov
a9f7d50998 Added new benchmarks 2022-11-11 14:49:31 +03:00
Konstantin Pavlov
553e74c437 Updated Vivado gitignore 2022-11-11 14:29:24 +03:00
Konstantin Pavlov
f9cfe3935b Added XPM sources 2022-11-10 11:07:17 +03:00
Konstantin Pavlov
da92eddd80 Added swap script 2022-11-10 10:28:22 +03:00
Konstantin Pavlov
2543bcd567 Added scripts 2022-08-24 12:42:56 +03:00
Konstantin Pavlov
3d0bb13dda Updated Vivado gitignore 2022-07-29 13:50:45 +03:00
Konstantin Pavlov
b1c07c9c5f Added Verilog versions of UART components 2022-07-12 20:03:13 +03:00
Konstantin Pavlov
0d9f67ff80 Updated testbench template 2022-07-03 16:39:54 +03:00
Konstantin Pavlov
5abae5370e Update Modelsim gitignore 2022-07-03 16:38:37 +03:00
Konstantin Pavlov
65c465506b Updated tb template with clock gen module 2022-06-19 20:18:37 +03:00
Konstantin Pavlov
6d98d9d93a Added configurable simulation clock gen 2022-06-19 20:17:44 +03:00
Konstantin Pavlov
49fefc9bf0 Straight and simple realization of recursive scripts 2022-06-16 06:59:32 +03:00
Konstantin Pavlov
783c33e268 Updated testbench template project 2022-06-16 06:57:56 +03:00
Konstantin Pavlov
8f32dd53d9 Added pattern detector and tb 2022-06-16 06:56:45 +03:00
Konstantin Pavlov
24fbb6c3d3 Added optional filtering 2022-06-06 09:53:55 +03:00
Konstantin Pavlov
f7c4995847 Added fifo combiner 2022-06-06 09:53:15 +03:00
Konstantin Pavlov
b8af169ee5 Updated scripts 2022-06-06 09:52:10 +03:00
Konstantin Pavlov
2388fd3d54 Removed obsolete files. Updated scripts 2022-06-01 17:53:44 +03:00
Konstantin Pavlov
5bba1d2b7e Updated Vivado clean script 2022-05-20 21:36:55 +03:00
Konstantin Pavlov
e583c9f977 Added reference souce code dir 2022-05-16 19:44:36 +03:00
Konstantin Pavlov
864a6900b9 More README fixes 2022-05-16 19:39:38 +03:00
Konstantin Pavlov
8d569ce7a1 Fixed READMEs 2022-05-16 19:29:41 +03:00
Konstantin Pavlov
66733fa819 Added benchmark_projects dir README 2022-05-16 19:21:43 +03:00
Konstantin Pavlov
f6a5726184 Added reference benchmark project for Gowin IDE 2022-05-16 19:06:38 +03:00
Konstantin Pavlov
68ec41121e Added gitignore and clen script for Gowin IDE projects 2022-05-16 18:58:36 +03:00
Konstantin Pavlov
b4c6697703 Added Fmax test project for Gowin 2022-05-16 18:56:57 +03:00
Konstantin Pavlov
f2ed27297d Added Fmax test projects for Quartus and for Vivado 2022-05-01 15:03:04 +03:00
Konstantin Pavlov
8d956479da Added Fmax computation script for Xilinx Vivado 2022-05-01 15:01:47 +03:00
Konstantin Pavlov
9ea8e5e037 Done fifo buffer and tests 2022-05-01 14:52:53 +03:00
Konstantin Pavlov
f74126e5d6 Minor style fixes 2022-05-01 14:50:23 +03:00
Konstantin Pavlov
fd06088078 Added read ahead buffer 2022-04-25 03:43:52 +03:00
Konstantin Pavlov
a6aa3c3893 Done fifo initialization 2022-04-25 01:06:34 +03:00
Konstantin Pavlov
66ff427e1e Added error suppression for Modelsim script 2022-04-25 01:03:37 +03:00
Konstantin Pavlov
98040673a3 Added fifo initialization 2022-04-23 10:12:04 +03:00
Konstantin Pavlov
68b33a10d4 Added simple UART logger 2022-04-23 04:29:15 +03:00
Konstantin Pavlov
c6d4f60bca Updated mem_writer scripts and example output 2022-04-05 18:39:41 +03:00
Konstantin Pavlov
322fa85652 Updated test projects to support dev boards 2022-04-05 18:35:04 +03:00
Konstantin Pavlov
db847e6e7e Added RAM templates 2022-03-31 20:20:15 +03:00
Konstantin Pavlov
90a8836c3d Added clogb2 function 2022-03-31 15:42:11 +03:00
Konstantin Pavlov
e3cba6a4f6 Changed reset mode to asynchronous for soft_latch.sv 2022-03-31 15:36:38 +03:00
Konstantin Pavlov
1a32f07dfc Added optional WIDTH parameter. Made reset signal to be asynchronous 2022-03-31 15:31:57 +03:00
Konstantin Pavlov
a928a6c326 Updated Vivado test project to v2. Digilent Arty board does supported now 2022-03-30 19:40:12 +03:00