basic_verilog/benchmark_projects

// readme for "benchmark_projects" directory
// published as part of https://github.com/pConst/basic_verilog
// Konstantin Pavlov, pavlovconst@gmail.com

The directory contains single reference System Verilog codebase, compiled consistently for multiple FPGA platforms and vendors.

Supported IDE projects include

• Xilinx ISE
• Xilinx Vivado
• Intel Quartus
• Gowin IDE

Currently working on

• Microsemi Libero
• Lattice iCEcube
• Lattice FOSS toolchain

See comparative compile time results in ./benchmark_results.txt