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basic_verilog/scripts/get_fmax_vivado.tcl
2022-05-01 15:01:47 +03:00

19 lines
553 B
Tcl
Executable File

#------------------------------------------------------------------------------
# get_fmax_vivado.tcl
# published as part of https://github.com/pConst/basic_verilog
# Konstantin Pavlov, pavlovconst@gmail.com
#------------------------------------------------------------------------------
fmax 1000
# compuiting fmax, in MHz, given target clock in MHz
proc fmax {target_clock} {
open_run impl_1
puts [ join [ list \
[expr round(1e3/((1e3/$target_clock)-[get_property SLACK [get_timing_paths]]))] \
" MHz" ] "" ]
puts ""
}