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FPGA
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basic_verilog
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basic_verilog
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gitignores
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Konstantin Pavlov
39490aed15
Added typical .gitignore-files for FPGA projects
2021-10-28 10:03:57 +03:00
..
.gitignore_modelsim
Added typical .gitignore-files for FPGA projects
2021-10-28 10:03:57 +03:00
.gitignore_quartus
Added typical .gitignore-files for FPGA projects
2021-10-28 10:03:57 +03:00
.gitignore_vivado
Added typical .gitignore-files for FPGA projects
2021-10-28 10:03:57 +03:00
