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17 lines
499 B
Bash
17 lines
499 B
Bash
#! /usr/bin/env bash
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#------------------------------------------------------------------------------
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# published as part of https://github.com/pConst/basic_verilog
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# Konstantin Pavlov, pavlovconst@gmail.com
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#------------------------------------------------------------------------------
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# Script to perform HLS component simulation
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# see ../example_projects/vitis_hls_prj_template_v1/ for complete example
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if [ ! -d "./prj" ]; then
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source vitis_hls_csynth.sh
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fi
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vitis_hls -eval 'csim_design'
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