basic_verilog/Advanced Synthesis Cookbook/arithmetic/make_comp.cpp

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#include <stdio.h>

int const num_ins = 3;

int main (void)
{
	unsigned int n = 0, k = 0, sum = 0;

	fprintf (stdout,"    case (data)\n");
	for (n=0; n<(1<<num_ins); n++)
	{
		sum = 0;
		for (k=0; k<num_ins; k++)
		{
			if ((n & (1 << k)) != 0)
			{
				sum++;
			}
		}
		fprintf (stdout,"      %d: sum=%d;\n",n,sum);
	}
	fprintf (stdout,"      default: sum=0;\n");
    fprintf (stdout,"    endcase\n");

	return (0);
}